Hi,
does anyone own a motherboard with an intel chipset and with an ICH5/6 io controller hub? I've modified atapi a little bit. Atapi may detect the second ide (SATA) controller of an ICH5/6. I'm interested on the debug output from atapi while booting.
- Hartmut
M:\Sandbox\ros_work\reactos>set SVN_EDITOR=notepad
M:\Sandbox\ros_work\reactos>d:\programme\subversion\bin\svn.exe diff drivers\storage\atapi\atapi.c Index: drivers/storage/atapi/atapi.c =================================================================== --- drivers/storage/atapi/atapi.c (revision 14209) +++ drivers/storage/atapi/atapi.c (working copy) @@ -123,7 +123,15 @@ ULONG Dummy; } UNIT_EXTENSION, *PUNIT_EXTENSION;
-PCI_SLOT_NUMBER LastSlotNumber; +#if 1 +/* + * FIXME: + * ScsiPortGetDeviceBase must check if a resource is already in use. + * This needs to implement IoReportResourceUsage or IoReportResourceForDetection. + */ +ULONG CommandPortArray[64]; +ULONG CommandPortCount = 0; +#endif
#ifdef ENABLE_NATIVE_PCI typedef struct _PCI_NATIVE_CONTROLLER @@ -388,8 +396,6 @@ InitData.DeviceId = 0; InitData.DeviceIdLength = 0;
- LastSlotNumber.u.AsULONG = 0xFFFFFFFF; - Status = ScsiPortInitialize(DriverObject, RegistryPath, &InitData, @@ -437,6 +443,27 @@ #ifdef ENABLE_DMA ULONG Length; #endif +#if 1 + /* + * FIXME: + * ScsiPortGetDeviceBase must check if a resource is already in use. + * This needs to implement IoReportResourceUsage or IoReportResourceForDetection. + */ + ULONG i; + + for (i = 0; i < CommandPortCount; i++) + { + if (CommandPortArray[i] == CommandPortBase) + { + break; + } + } + if (i < CommandPortCount || + CommandPortCount >= 64) + { + return FALSE; + } +#endif IoAddress = ScsiPortConvertUlongToPhysicalAddress(CommandPortBase); IoBase = ScsiPortGetDeviceBase((PVOID)DevExt, InterfaceType, @@ -534,6 +561,14 @@ { ConfigInfo->AtdiskSecondaryClaimed = TRUE; } +#if 1 + /* + * FIXME: + * ScsiPortGetDeviceBase must check if a resource is already in use. + * This needs to implement IoReportResourceUsage or IoReportResourceForDetection. + */ + CommandPortArray[CommandPortCount++] = CommandPortBase; +#endif return TRUE; }
@@ -559,7 +594,7 @@ BOOLEAN DeviceFound; ULONG BusMasterBasePort = 0;
- DPRINT("AtapiFindCompatiblePciController() Bus: %lu Slot: %lu\n", + DPRINT1("AtapiFindCompatiblePciController() Bus: %lu Slot: %lu\n", ConfigInfo->SystemIoBusNumber, ConfigInfo->SlotNumber);
@@ -600,10 +635,10 @@ } } - DPRINT("%x %x\n", PciConfig.BaseClass, PciConfig.SubClass); - if (PciConfig.BaseClass == 0x01 && - PciConfig.SubClass == 0x01) // && -// (PciConfig.ProgIf & 0x05) == 0) + DPRINT("%x %x %x\n", PciConfig.BaseClass, PciConfig.SubClass, PciConfig.ProgIf); + if (PciConfig.BaseClass == PCI_CLASS_MASS_STORAGE_CTLR && + PciConfig.SubClass == PCI_SUBCLASS_MSC_IDE_CTLR && + (PciConfig.ProgIf & 0x05) == 0) { /* both channels are in compatibility mode */ DPRINT("Bus %1lu Device %2lu Func %1lu VenID 0x%04hx DevID 0x%04hx\n", @@ -692,7 +727,7 @@ BOOLEAN ChannelFound = FALSE; BOOLEAN DeviceFound = FALSE;
- DPRINT("AtapiFindIsaBusController() called!\n"); + DPRINT1("AtapiFindIsaBusController() called!\n");
*Again = FALSE;
@@ -770,7 +805,7 @@ ULONG Count; BOOLEAN ChannelFound;
- DPRINT("AtapiFindNativePciController() called!\n"); + DPRINT1("AtapiFindNativePciController() called!\n");
SlotNumber.u.AsULONG = ConfigInfo->SlotNumber; StartDeviceNumber = SlotNumber.u.bits.DeviceNumber; @@ -799,9 +834,30 @@ break; } } - if (Count < sizeof(PciNativeController)/sizeof(PCI_NATIVE_CONTROLLER)) + if (PciConfig.BaseClass == 0x01) { - /* We have found a known native pci ide controller */ + DPRINT1("Bus %1lu Device %2lu Func %1lu VenID 0x%04hx DevID 0x%04hx\n", + ConfigInfo->SystemIoBusNumber, + SlotNumber.u.bits.DeviceNumber, + SlotNumber.u.bits.FunctionNumber, + PciConfig.VendorID, + PciConfig.DeviceID); + DPRINT1("BaseClass %02x, SubClass %02x, ProgIF %02x\n", PciConfig.BaseClass, PciConfig.SubClass, PciConfig.ProgIf); + DPRINT1("BaseAddresses[0] %08x\n", PciConfig.u.type0.BaseAddresses[0]); + DPRINT1("BaseAddresses[1] %08x\n", PciConfig.u.type0.BaseAddresses[1]); + DPRINT1("BaseAddresses[2] %08x\n", PciConfig.u.type0.BaseAddresses[2]); + DPRINT1("BaseAddresses[3] %08x\n", PciConfig.u.type0.BaseAddresses[3]); + DPRINT1("BaseAddresses[4] %08x\n", PciConfig.u.type0.BaseAddresses[4]); + DPRINT1("BaseAddresses[5] %08x\n", PciConfig.u.type0.BaseAddresses[5]); + DPRINT1("InterruptLine %d\n", PciConfig.u.type0.InterruptLine); + } + + if (Count < sizeof(PciNativeController)/sizeof(PCI_NATIVE_CONTROLLER) || + (PciConfig.BaseClass == PCI_CLASS_MASS_STORAGE_CTLR && + PciConfig.SubClass == PCI_SUBCLASS_MSC_IDE_CTLR && + (PciConfig.ProgIf & 0x05) == 0x05)) + { + /* We have found a known or a native pci ide controller */ if ((PciConfig.ProgIf & 0x80) && (PciConfig.u.type0.BaseAddresses[4] & PCI_ADDRESS_IO_SPACE)) { DPRINT("Found IDE Bus Master controller!\n"); @@ -813,40 +869,24 @@ BusMasterBasePort = 0; }
- DPRINT("VendorID: %04x, DeviceID: %04x\n", PciConfig.VendorID, PciConfig.DeviceID); + DPRINT1("VendorID: %04x, DeviceID: %04x\n", PciConfig.VendorID, PciConfig.DeviceID); ConfigInfo->NumberOfBuses = 1; ConfigInfo->MaximumNumberOfTargets = 2; ConfigInfo->MaximumTransferLength = 0x10000; /* max 64Kbyte */
- /* FIXME: - We must not store and use the last tested slot number. If there is a recall - to the some device and we will claim the primary channel again than the call - to ScsiPortGetDeviceBase in AtapiClaimHwResource will fail and we can try to - claim the secondary channel. - */ ChannelFound = FALSE; - if (LastSlotNumber.u.AsULONG != SlotNumber.u.AsULONG) + /* try to claim primary channel */ + if ((PciConfig.u.type0.BaseAddresses[0] & PCI_ADDRESS_IO_SPACE) && + (PciConfig.u.type0.BaseAddresses[1] & PCI_ADDRESS_IO_SPACE)) { - /* try to claim primary channel */ - if ((PciConfig.u.type0.BaseAddresses[0] & PCI_ADDRESS_IO_SPACE) && - (PciConfig.u.type0.BaseAddresses[1] & PCI_ADDRESS_IO_SPACE)) - { - /* primary channel is enabled */ - ChannelFound = AtapiClaimHwResources(DevExt, - ConfigInfo, - PCIBus, - PciConfig.u.type0.BaseAddresses[0] & PCI_ADDRESS_IO_ADDRESS_MASK, - PciConfig.u.type0.BaseAddresses[1] & PCI_ADDRESS_IO_ADDRESS_MASK, - BusMasterBasePort, - PciConfig.u.type0.InterruptLine); - if (ChannelFound) - { - AtapiFindDevices(DevExt, ConfigInfo); - *Again = TRUE; - ConfigInfo->SlotNumber = LastSlotNumber.u.AsULONG = SlotNumber.u.AsULONG; - return SP_RETURN_FOUND; - } - } + /* primary channel is enabled */ + ChannelFound = AtapiClaimHwResources(DevExt, + ConfigInfo, + PCIBus, + PciConfig.u.type0.BaseAddresses[0] & PCI_ADDRESS_IO_ADDRESS_MASK, + PciConfig.u.type0.BaseAddresses[1] & PCI_ADDRESS_IO_ADDRESS_MASK, + BusMasterBasePort, + PciConfig.u.type0.InterruptLine); } if (!ChannelFound) { @@ -862,21 +902,21 @@ PciConfig.u.type0.BaseAddresses[3] & PCI_ADDRESS_IO_ADDRESS_MASK, BusMasterBasePort ? BusMasterBasePort + 8 : 0, PciConfig.u.type0.InterruptLine); - if (ChannelFound) - { - AtapiFindDevices(DevExt, ConfigInfo); - *Again = FALSE; - LastSlotNumber.u.AsULONG = 0xFFFFFFFF; - return SP_RETURN_FOUND; - } } } + if (ChannelFound) + { + CHECKPOINT1; + AtapiFindDevices(DevExt, ConfigInfo); + *Again = TRUE; + ConfigInfo->SlotNumber = SlotNumber.u.AsULONG; + return SP_RETURN_FOUND; + } } } StartFunctionNumber = 0; } *Again = FALSE; - LastSlotNumber.u.AsULONG = 0xFFFFFFFF; DPRINT("AtapiFindNativePciController() done!\n");
return(SP_RETURN_NOT_FOUND);