Hi again ;)
Do you have any idea where the SSE registers should be stored?
The thing with the flag for the FPU state is nice, since it allows to
skip saving of the FPU state when not needed - do you know if we can do
the same for SSE?
Thanks,
blight
Hartmut Birr wrote:
Hi,
the fpu registers should be stored on a reserved area at the top of the
kernel stack. There are needed two areas, one for the user mode state and
the other for the kernel mode state. At startup of a thread the fpu is
disabled. The first fpu instruction creates an exception. The exception
handler sets a mark in the thread structure (NpxFlags?) and restore an saved
state if it exist one. It must check if it should restore the user or kernel
mode state. On a thread switch the mark of the current thread is checked and
the fpu state is saved if it is necessary. The fpu is disabled for the new
thread. An other problem are sse instructions. The bios may or may not
enable the sse instructions. Currently, ros doesn't enable the sse
instructions. If the cpu is set to pentium in the makefile and optimisation
is enabled, gcc will always use sse instructions.
- Hartmut
>-----Original Message-----
>From: ros-dev-bounces(a)reactos.com
>[mailto:ros-dev-bounces@reactos.com] On Behalf Of Gregor Anich
>Sent: Friday, October 08, 2004 6:02 PM
>To: ros-dev(a)reactos.com
>Subject: [ros-dev] Save FPU on task switch/SSE support
>
>
>Hi!
>
>Since I have seen mesa32 crash with SSE enabled I looked into
>fixing it
>a bit...
>When I was looking at ntoskrnl/ke/i386/tskswitch.S I found FIXMEs for
>debug/FPU save/restore.
>Now I am wondering where should this information be stored? I
>think it
>should be part of the TSS (include/ntos/tss.h) but I am not sure.
>For SSE support the SSE registers would also have to be
>saved/restored
>on task switches and some other stuff which I do not yet know I think.
>Maybe somebody can tell me where the FPU state should be
>stored so I can
>try to implement it.
>
>Thanks,
> blight
>
>