Re: [ros-dev] [ros-diffs] [fireball] 28448: - Allow pci read/writes during proving BAR's size operation

[Aleksey Bragin]

Hi,
sorry - no, this is an olpc-specific code in olpc branch, I have to  
emulate some PCI hardware (the code is taken from Linux), however  
ReactOS's PCI access is more complicated, and thus I slightly  
improved the code.

As for that crash - hmm. I will try the real hardware today maybe.


WBR,
Aleksey Bragin.

On Aug 22, 2007, at 7:31 AM, James Tabor wrote:

>   Hi!
>  Could this be related to 28448? I mean could it fix this? The  
>  buffer address
>  goes down from 8XXXXX to 3fffff (yes backwards, I watch it) and  
>  faults.
>  This fault was before 28448 and on real hardware. Display is normal  
>  and mouse
>  moves.
>  Thanks,
>  James
>
>  Unhandled exception
>  ExceptionCode:    c0000005
>  Faulting Address:   3fffff
>  Address:          78010e04   C:\ReactOS\system32\msvcrt.dll
>  CS:EIP 1b:78010e04
>  DS 23 ES 23 FS 3b GS 0
>  EAX: 0010ad41   EBX: 003fffff   ECX: 00001000
>  EDX: 009a2068   EBP: 0087f5b4   ESI: 00000002   ESP: 0087f5a0
>  EDI: 009a2068   EFLAGS: 00010217
>  Frames:
>      78000000+122c6      C:\ReactOS\system32\msvcrt.dll
>        400000+742eb      C:\ReactOS\explorer.exe
>        400000+609f4      C:\ReactOS\explorer.exe
>
>  _write lib/sdk/crt/io/write.c Line 55
>  .
>  .
>  .
>         while (_nbyte--) {
>  ---->     if (*in == 0x0a) {
>  .
>  .
>  .
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