Commit in reactos/hal/halx86 on MAIN
pci.c+17-11.13 -> 1.14
Register handler for PCI bus 2.

reactos/hal/halx86
pci.c 1.13 -> 1.14
diff -u -r1.13 -r1.14
--- pci.c	1 Nov 2004 14:37:19 -0000	1.13
+++ pci.c	15 Nov 2004 09:18:19 -0000	1.14
@@ -1,4 +1,4 @@
-/* $Id: pci.c,v 1.13 2004/11/01 14:37:19 hbirr Exp $
+/* $Id: pci.c,v 1.14 2004/11/15 09:18:19 ekohl Exp $
  *
  * COPYRIGHT:       See COPYING in the top level directory
  * PROJECT:         ReactOS kernel
@@ -782,6 +782,22 @@
   BusHandler->AssignSlotResources =
     (pAssignSlotResources)HalpAssignPciSlotResources;
 
+
+  /* PCI bus (bus 2) handler */
+  BusHandler = HalpAllocateBusHandler(PCIBus,
+				      PCIConfiguration,
+				      2);
+  BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
+  BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
+  BusHandler->GetInterruptVector =
+    (pGetInterruptVector)HalpGetPciInterruptVector;
+  BusHandler->TranslateBusAddress = 
+    (pTranslateBusAddress)HalpTranslatePciAddress;
+//	BusHandler->AdjustResourceList =
+//		(pGetSetBusData)HalpAdjustPciResourceList;
+  BusHandler->AssignSlotResources =
+    (pAssignSlotResources)HalpAssignPciSlotResources;
+
   DPRINT("HalpInitPciBus() finished.\n");
 }
 
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