Commit in reactos on MAIN
hal/halx86/generic/display.c+12-121.2 -> 1.3
                  /halinit.c+3-41.1 -> 1.2
                  /mem.c-421.1 removed
hal/halx86/mp/Makefile+1-21.2 -> 1.3
hal/halx86/up/Makefile+1-21.2 -> 1.3
ntoskrnl/ke/i386/kernel.c+17-171.43 -> 1.44
                /multiboot.S-31.31 -> 1.32
+34-82
1 removed + 6 modified, total 7 files
Use MmMapIoSpace() instead of messing around with the page tables directly
when mapping the video frame buffer for HAL

reactos/hal/halx86/generic
display.c 1.2 -> 1.3
diff -u -r1.2 -r1.3
--- display.c	4 Dec 2004 17:22:46 -0000	1.2
+++ display.c	4 Dec 2004 21:40:55 -0000	1.3
@@ -16,7 +16,7 @@
  *  along with this program; if not, write to the Free Software
  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
-/* $Id: display.c,v 1.2 2004/12/04 17:22:46 gvg Exp $
+/* $Id: display.c,v 1.3 2004/12/04 21:40:55 gvg Exp $
  *
  * COPYRIGHT:       See COPYING in the top level directory
  * PROJECT:         ReactOS kernel
@@ -576,12 +576,20 @@
  *         InitParameters = Parameters setup by the boot loader
  */
 {
-  if (DisplayInitialized == FALSE)
+  PHYSICAL_ADDRESS PhysBuffer;
+
+  if (! DisplayInitialized)
     {
       ULONG ScanLines;
       ULONG Data;
 
-      GraphVideoBuffer = (PUCHAR) HalpMapPhysMemory(VGA_GRAPH_MEM, VGA_END_MEM - VGA_GRAPH_MEM + 1);
+      PhysBuffer.u.HighPart = 0;
+      PhysBuffer.u.LowPart = VGA_GRAPH_MEM;
+      GraphVideoBuffer = MmMapIoSpace(PhysBuffer, VGA_END_MEM - VGA_GRAPH_MEM + 1, MmNonCached);
+      if (NULL == GraphVideoBuffer)
+        {
+          return;
+        }
       VideoBuffer = (PUSHORT) (GraphVideoBuffer + (VGA_CHAR_MEM - VGA_GRAPH_MEM));
 
       /* Set cursor position */
@@ -679,7 +687,7 @@
   ULONG Flags;
 
   /* See comment at top of file */
-  if (!HalOwnsDisplay)
+  if (! HalOwnsDisplay || ! DisplayInitialized)
     {
       return;
     }
@@ -691,14 +699,6 @@
 
   Ki386SaveFlags(Flags);
   Ki386DisableInterrupts();
-
-
-#if 0  
-  if (HalOwnsDisplay == FALSE)
-    {
-      HalReleaseDisplayOwnership();
-    }
-#endif
   
 #ifdef SCREEN_SYNCHRONIZATION
   WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, CRTC_CURHI);

reactos/hal/halx86/generic
halinit.c 1.1 -> 1.2
diff -u -r1.1 -r1.2
--- halinit.c	3 Dec 2004 20:10:43 -0000	1.1
+++ halinit.c	4 Dec 2004 21:40:55 -0000	1.2
@@ -1,4 +1,4 @@
-/* $Id: halinit.c,v 1.1 2004/12/03 20:10:43 gvg Exp $
+/* $Id: halinit.c,v 1.2 2004/12/04 21:40:55 gvg Exp $
  *
  * COPYRIGHT:     See COPYING in the top level directory
  * PROJECT:       ReactOS kernel
@@ -38,13 +38,12 @@
 {
   if (BootPhase == 0)
     {
-      /* Initialize display and make the screen black */
-      HalInitializeDisplay (LoaderBlock);
-
       HalpInitPhase0();      
     }
   else if (BootPhase == 1)
     {
+      /* Initialize display and make the screen black */
+      HalInitializeDisplay (LoaderBlock);
       HalpInitBusHandlers();
       HalpInitDma();
 

reactos/hal/halx86/generic
mem.c removed after 1.1
diff -N mem.c
--- mem.c	4 Dec 2004 17:22:46 -0000	1.1
+++ /dev/null	1 Jan 1970 00:00:00 -0000
@@ -1,42 +0,0 @@
-/* $Id: mem.c,v 1.1 2004/12/04 17:22:46 gvg Exp $
- *
- * COPYRIGHT:       See COPYING in the top level directory
- * PROJECT:         ReactOS kernel
- * FILE:            hal/halx86/generic/mem.c
- * PURPOSE:         Memory mapping functions
- * PROGRAMMER:      Ge van Geldorp (gvg@reactos.com)
- * UPDATE HISTORY:
- *                  Created 2004/12/03
- */
-
-#include <ddk/ntddk.h>
-
-#define PAGETABLE_MAP     (0xf0000000)
-
-#define ADDR_TO_PTE(v) (PULONG)(PAGETABLE_MAP + ((((ULONG)(v) / 1024))&(~0x3)))
-
-#define VIRT_ADDR 0xff400000
-
-PVOID
-HalpMapPhysMemory(ULONG PhysAddr, ULONG Size)
-{
-  PULONG PageTable;
-  unsigned i;
-
-  PageTable = (PULONG)PAGE_ROUND_DOWN((PVOID)ADDR_TO_PTE(VIRT_ADDR));
-  for (i = 0; i < PAGE_ROUND_UP(Size) / PAGE_SIZE; i++)
-    {
-      PageTable[i] = (PhysAddr | 0x3);
-      PhysAddr += PAGE_SIZE;
-    }
-
-  /* Flush TLB */
-  __asm__ __volatile__(
-    "movl %%cr3,%%eax\n\t"
-    "movl %%eax,%%cr3\n\t"
-    : : : "eax" );
-
-  return (PVOID) VIRT_ADDR;
-}
-
-/* EOF */

reactos/hal/halx86/mp
Makefile 1.2 -> 1.3
diff -u -r1.2 -r1.3
--- Makefile	4 Dec 2004 17:22:47 -0000	1.2
+++ Makefile	4 Dec 2004 21:40:55 -0000	1.3
@@ -1,4 +1,4 @@
-# $Id: Makefile,v 1.2 2004/12/04 17:22:47 gvg Exp $
+# $Id: Makefile,v 1.3 2004/12/04 21:40:55 gvg Exp $
 
 PATH_TO_TOP = ../../..
 
@@ -48,7 +48,6 @@
 	isa.o \
 	kdbg.o \
 	mca.o \
-	mem.o \
 	misc.o \
 	pci.o \
 	portio.o \

reactos/hal/halx86/up
Makefile 1.2 -> 1.3
diff -u -r1.2 -r1.3
--- Makefile	4 Dec 2004 17:22:47 -0000	1.2
+++ Makefile	4 Dec 2004 21:40:55 -0000	1.3
@@ -1,4 +1,4 @@
-# $Id: Makefile,v 1.2 2004/12/04 17:22:47 gvg Exp $
+# $Id: Makefile,v 1.3 2004/12/04 21:40:55 gvg Exp $
 
 PATH_TO_TOP = ../../..
 
@@ -52,7 +52,6 @@
 	isa.o \
 	kdbg.o \
 	mca.o \
-	mem.o \
 	misc.o \
 	pci.o \
 	portio.o \

reactos/ntoskrnl/ke/i386
kernel.c 1.43 -> 1.44
diff -u -r1.43 -r1.44
--- kernel.c	28 Nov 2004 01:31:07 -0000	1.43
+++ kernel.c	4 Dec 2004 21:40:55 -0000	1.44
@@ -336,55 +336,55 @@
 
    if (Pcr->PrcbData.FeatureBits & X86_FEATURE_PAE)
    {
-      DPRINT1("CPU supports PAE mode\n");
+      DPRINT("CPU supports PAE mode\n");
       if (Ke386Pae)
       {
-         DPRINT1("CPU runs in PAE mode\n");
+         DPRINT("CPU runs in PAE mode\n");
          if (Ke386NoExecute)
          {
-            DPRINT1("NoExecute is enabled\n");
+            DPRINT("NoExecute is enabled\n");
          }
       }
       else
       {
-         DPRINT1("CPU doesn't run in PAE mode\n");
+         DPRINT("CPU doesn't run in PAE mode\n");
       }
    }
    if ((Pcr->PrcbData.FeatureBits & (X86_FEATURE_FXSR | X86_FEATURE_MMX | X86_FEATURE_SSE | X86_FEATURE_SSE2)) ||
        (Ke386CpuidFlags2 & X86_EXT_FEATURE_SSE3))
       {
-         DPRINT1("CPU supports" "%s%s%s%s%s" ".\n",
-                 ((Pcr->PrcbData.FeatureBits & X86_FEATURE_FXSR) ? " FXSR" : ""),
-                 ((Pcr->PrcbData.FeatureBits & X86_FEATURE_MMX) ? " MMX" : ""),
-                 ((Pcr->PrcbData.FeatureBits & X86_FEATURE_SSE) ? " SSE" : ""),
-                 ((Pcr->PrcbData.FeatureBits & X86_FEATURE_SSE2) ? " SSE2" : ""),
-                 ((Ke386CpuidFlags2 & X86_EXT_FEATURE_SSE3) ? " SSE3" : ""));
+         DPRINT("CPU supports" "%s%s%s%s%s" ".\n",
+                ((Pcr->PrcbData.FeatureBits & X86_FEATURE_FXSR) ? " FXSR" : ""),
+                ((Pcr->PrcbData.FeatureBits & X86_FEATURE_MMX) ? " MMX" : ""),
+                ((Pcr->PrcbData.FeatureBits & X86_FEATURE_SSE) ? " SSE" : ""),
+                ((Pcr->PrcbData.FeatureBits & X86_FEATURE_SSE2) ? " SSE2" : ""),
+                ((Ke386CpuidFlags2 & X86_EXT_FEATURE_SSE3) ? " SSE3" : ""));
       }
    if (Ke386GetCr4() & X86_CR4_OSFXSR)
       {
-         DPRINT1("SSE enabled.\n");
+         DPRINT("SSE enabled.\n");
       }
    if (Ke386GetCr4() & X86_CR4_OSXMMEXCPT)
       {
-         DPRINT1("Unmasked SIMD exceptions enabled.\n");
+         DPRINT("Unmasked SIMD exceptions enabled.\n");
       }
    if (Pcr->PrcbData.VendorString[0])
    {
-      DPRINT1("CPU Vendor: %s\n", Pcr->PrcbData.VendorString);
+      DPRINT("CPU Vendor: %s\n", Pcr->PrcbData.VendorString);
    }
    if (Ke386CpuidModel[0])
    {
-      DPRINT1("CPU Model:  %s\n", Ke386CpuidModel);
+      DPRINT("CPU Model:  %s\n", Ke386CpuidModel);
    }
 
-   DPRINT1("Ke386CacheAlignment: %d\n", Ke386CacheAlignment);
+   DPRINT("Ke386CacheAlignment: %d\n", Ke386CacheAlignment);
    if (Ke386L1CacheSize)
    {
-      DPRINT1("Ke386L1CacheSize: %dkB\n", Ke386L1CacheSize);
+      DPRINT("Ke386L1CacheSize: %dkB\n", Ke386L1CacheSize);
    }
    if (Pcr->L2CacheSize)
    {
-      DPRINT1("Ke386L2CacheSize: %dkB\n", Pcr->L2CacheSize);
+      DPRINT("Ke386L2CacheSize: %dkB\n", Pcr->L2CacheSize);
    }
 }
 

reactos/ntoskrnl/ke/i386
multiboot.S 1.31 -> 1.32
diff -u -r1.31 -r1.32
--- multiboot.S	4 Dec 2004 17:22:47 -0000	1.31
+++ multiboot.S	4 Dec 2004 21:40:55 -0000	1.32
@@ -119,7 +119,6 @@
 	movl	$(V2P(apic_pagetable) + 0x3), 0xFEC(%esi)
 #endif /* MP */
 	movl	$(V2P(kpcr_pagetable) + 0x3), 0xFF0(%esi)
-	movl	$(V2P(hal_pagetable) + 0x3), 0xFF4(%esi)
 
 	/*
 	 * Initialize the page table that maps low memory
@@ -364,8 +363,6 @@
 kpcr_pagetable:
 	.fill 4096, 1, 0
 
-/* Reserve a pagetable for HAL to play around with during early boot */
-hal_pagetable:
 	.fill 4096, 1, 0
 _pagetable_end:
 _unmap_me:
CVSspam 0.2.8