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5788 discussions

RE: [ros-diffs] [greatlrd] 14366: did foget the icon form mf

by Ge van Geldorp

Please don't do this. shell32 is a component shared with Wine. I'd very much prefer to get the new icons into Wine. If that's not possible at least follow the way Wine does things (i.e. ascii-encoding the .ico files in the .rc), as it will make the job of keeping ReactOS and Wine in sync easier. Thanks, Gé van Geldorp. -----Original Message----- From: ros-diffs-bounces(a)reactos.com [mailto:ros-diffs-bounces@reactos.com] On Behalf Of greatlrd(a)svn.reactos.com Sent: Monday, March 28, 2005 18:51 To: ros-diffs(a)reactos.com Subject: [ros-diffs] [greatlrd] 14366: did foget the icon form mf did foget the icon form mf Added: trunk/reactos/lib/shell32/res/folder.ico Added: trunk/reactos/lib/shell32/res/folder_open.ico Added: trunk/reactos/lib/shell32/res/mycomputer.ico

19 years, 5 months

feature request for (xml) build

by Hartmut Birr

Hi, I would like it if I can build ros outside from the source tree. This makes it possible to build ros with different configurations from the same (highly modified) source tree. - Hartmut

19 years, 5 months

kernel32\comm.c improvements

by Saveliy Tretiakov

Hi. This is what I've changed: 1. Implement ClearCommError. I din't test it too much, but it should be ok. I've reveresed WinXP's ClearCommError to ensure that my implementation is correct :) 2. Correct badly implemented apis. For Example: ClearCommBreak(HANDLE hFile) { BOOL result = FALSE; DWORD dwBytesReturned; if (hFile == INVALID_HANDLE_VALUE) { return FALSE; } result = DeviceIoControl(hFile, IOCTL_SERIAL_SET_BREAK_OFF, NULL, 0, NULL, 0, &dwBytesReturned, NULL); return TRUE; } Check for INVALID_HANDLE_VALUE is not needed here. I removed all these checks from everywhere in comm.c. Function will return TRUE even if DeviceIoControl fails. This is wrong. Modified functions: ClearCommBreak, EscapeCommFunction, GetCommMask, GetCommModemStatus GetCommState, GetCommTimeouts, PurgeComm, SetCommBreak, SetCommMask, SetCommTimeouts, SetCommState, SetupComm, TransmitCommChar, WaitCommEvent

19 years, 5 months

serial port type detection (pt. 2)

by Mark Junker

Hi, in a documentation I saw that I probably had a bug in the patch for the serial port type detection. The attached patch should fix the problem. This comment in this patch also explains what is/was my problem with the value(s) specified in the documentation. Regards, Mark Index: drivers/dd/serial/legacy.c =================================================================== --- drivers/dd/serial/legacy.c (revision 14297) +++ drivers/dd/serial/legacy.c (working copy) @@ -62,7 +62,11 @@ { case 0x00: return Uart16450; + case 0x40: case 0x80: + /* Not sure about this but the documentation says that 0x40 + * indicates an unusable FIFO but my tests only worked + * with 0x80 */ return Uart16550; }

19 years, 5 months

KeRundownThread question

by Hartmut Birr

Hi, in KeRundownThread is an ASSERT statement. What is the reason for that? ApcDisable is never changed. It is always 1 for mutex objects and always 0 for mutant objects. If a mutant object is on the list, ros does crash. - Hartmut Index: ntoskrnl/ke/kthread.c =================================================================== --- ntoskrnl/ke/kthread.c (revision 14297) +++ ntoskrnl/ke/kthread.c (working copy) @@ -360,7 +360,7 @@ /* Get the Mutant */ Mutant = CONTAINING_RECORD(CurrentEntry, KMUTANT, MutantListEntry); - ASSERT(Mutant->ApcDisable); +// ASSERT(Mutant->ApcDisable);

19 years, 5 months

Re: [ros-dev] New proposed frontpage for reactos.com

by Steven Edwards

--- Jason Filby <jason.filby(a)gmail.com> wrote: > None of the links go anywhere yet. ezPublish will be phased out and > most of the content hosted in a wiki (editable only by people trusted > in the project). > > The wiki/forums/blogs would require a bit of a face-lift so as to look similar. > > Comments? I like it except I think the description of what ReactOS is needs to say something like "A effort to create a FreeSoftware replacement for Microsoft Windows(TM) that is compatbile with existing hardware and software". It does not violate trademark as we are describing what we do. Thanks Steven __________________________________ Do you Yahoo!? Yahoo! Small Business - Try our new resources site! http://smallbusiness.yahoo.com/resources/

19 years, 5 months

Re: [ros-svn] [hbirr] 14296: - Guarded the calls to IoSetCancelRoutine with IoAcquireCancelSpinLock/IoReleaseCancelSpinLock.

by Filip Navara

hbirr(a)svn.reactos.com wrote: >- Guarded the calls to IoSetCancelRoutine with IoAcquireCancelSpinLock/IoReleaseCancelSpinLock. >- Used a fastmutex as lock for the data queue. >- Used paged pool for the data buffers. >- Allowed the server to read (and to wait) on a listening pipe. >- Implemented the non blocking read operations. > >Updated files: >trunk/reactos/drivers/fs/np/create.c >trunk/reactos/drivers/fs/np/fsctrl.c >trunk/reactos/drivers/fs/np/npfs.c >trunk/reactos/drivers/fs/np/npfs.h >trunk/reactos/drivers/fs/np/rw.c > > This change seems to break RPC connection reads. I'm currently busy working on other things so I can't look at the problem. Any help is appreciated... (little test application attached, source available on request or in PSDK examples) - Filip

19 years, 5 months

Service Control Manager, Plug and Pray, SMB and RPC

by Steven Edwards

Hi, Am I correct in understanding we are going to need a real rpc implementation to correctly support Plug and Play as well as Services, DCOM and SMB related stuff? I know the Wine DCOM and Service Code does everything over named pipes on the local system but I assume we want to do things "properly". Should we look at doing a mingw build of FreeDCE or the DEC-RPC? I am happy to try and help import any code if it will help. Thanks Steven __________________________________ Do you Yahoo!? Yahoo! Small Business - Try our new resources site! http://smallbusiness.yahoo.com/resources/

19 years, 5 months

Re: [ros-dev] Re: [ros-svn] [gvg] 14302: Build freeldr as elf executable, initial Xen support

by Steven Edwards

--- Filip Navara <xnavara(a)volny.cz> wrote: > Just to let you know, there's no need to change the wide-character > string literals. You can use the -fshort-wchar GCC switch to get the > desired behaviour without touching the sources... I was under the impression short-wchar could differ depending on the platform and thats why wide-characters were a no-no in wine. Or is it that only newer gcc's support this option? Thanks Steven __________________________________ Do you Yahoo!? Yahoo! Small Business - Try our new resources site! http://smallbusiness.yahoo.com/resources/

19 years, 5 months

RE: [ros-dev] ping Alex regarding log2() for scheduler

by Waldo Alvarez Cañizares

Hi Royce: int highest_bit ( int i ) { int ret = 0; if ( i > 0xffff ) i >>= 16, ret = 16; if ( i > 0xff ) i >>= 8, ret += 8; if ( i > 0xf ) i >>= 4, ret += 4; if ( i > 0x3 ) i >>= 2, ret += 2; return ret + (i>>1); } Guys I think I have one of those optimizations manuals for asm that actually use only one multiplication by a called ¨magic number¨ to get the first bit set. I actually don´t want to trace this code in my head but if you are searching a fast BSF replacement... It was tested using brute force for the 2^32 possible values on the argumment. Maybe you could check the internet for ¨Agner Fog optimization¨. I have a very bad memory so maybe the name is wrong. This is all the info I can give until I get home. Ohh well i can do it myself: http://www.df.lth.se/~john_e/gems/gem0039.html It was Harley´s magic number. so I wasn´t that far. or you can read it here... I have a c version but I guess you don´t need that :) ---------------------------------------------------------------------------------------------------------- Fast BSF replacement ASM/80386 Macro EMBSF5 emulates the BSF instruction for non-zero argument <------------------------------------ remember to test for this!!!!!!! This macro utilizes an algorithm published in the news group comp.arch by Robert Harley in 1996. The algorithm converts the general problem of finding the position of the least significant set bit into a special case of counting the number of bits in a contiguous block of set bits. By computing x^(x-1), where x is the original input argument, a right-aligned contiguous group of set bits is created, whose cardinality equals the position of the least significant set bit in the original input plus 1. The input x is of the form (regular expression): {x}n1{0}m. x-1 has the form {x}n{0}(m+1), and x^(x-1) has the form {0}n{1}(m+1). This step is pretty similar to the one used by macro PREPBSF <http://www.df.lth.se/~john_e/gems/gem002e.html> , only that PREPBSF <http://www.df.lth.se/~john_e/gems/gem002e.html> creates a right-aligned group of set bits whose cardinality equals exactly the position of the least significant set bit. Harley's algorithm then employs a special method to count the number of bits in the right-aligned contiguous block of set bits. I am not sure upon which number theoretical argument it is founded, and it wasn't explained in the news group post. According to Harley, if a 32-bit number of the form 00...01...11 is multiplied by the "magic" number (7*255*255*255), then bits <31:26> of the result uniquely identify the number of set bits in that number. A 64 entry table is used to map that unique result to the bit count. Here, I have modified the table to reflect the bit position of the least significant set bit in the original argument, which is one less than the bit count of the intermediate result. I have tested the macro EMBSF5 exhaustively for all 2^32-1 possible inputs, i.e. for all 32-bit numbers except zero. Place the following table in the data segment: table db 0, 0, 0,15, 0, 1,28, 0,16, 0, 0, 0, 2,21,29, 0 db 0, 0,19,17,10, 0,12, 0, 0, 3, 0, 6, 0,22,30, 0 db 14, 0,27, 0, 0, 0,20, 0,18, 9,11, 0, 5, 0, 0,13 db 26, 0, 0, 8, 0, 4, 0,25, 0, 7,24, 0,23, 0,31, 0 And here follows the actual macro: ; ; emulate bsf instruction ; ; input: ; eax = number to preform a bsf on ( != 0 ) ; ; output: ; edx = result of bsf operation ; ; destroys: ; ecx ; eflags ; MACRO EMBSF5 mov edx,eax ; do not disturb original argument dec edx ; n-1 xor edx,eax ; n^(n-1), now EDX = 00..01..11 IFDEF FASTMUL imul edx,7*255*255*255 ; multiply by Harley's magic number ELSE mov ecx,edx ; do multiply using shift/add method shl edx,3 sub edx,ecx mov ecx,edx shl edx,8 sub edx,ecx mov ecx,edx shl edx,8 sub edx,ecx mov ecx,edx shl edx,8 sub edx,ecx ENDIF shr edx,26 ; extract bits <31:26> movzx edx,[table+edx] ; translate into bit count - 1 ENDM Note: FASTMUL can be defined if your CPU has a fast integer multiplicator, like the AMD. The IMUL replacement should run in about 8-9 cycles. Gem writer: Norbert Juffa <mailto:norbert.juffa@amd.com> last updated: 1999-09-02 ---------------------------------------------------------------------------------------------------------- >> updated micro-code << Wow where I can get this? Do you have an assembler/disassembler? I once asked Tigran Aizvian but he told me not to have the information at all. With that I could save myself some time reversing it by trial and error using the black box approach. Someday. As far as I know still Intel CPUs microcode updates are not digitally signed so it could be reprogrammed. Here's updated micro-code for BSR, if you really think AMD & Intel will actually do it... IF r/m = 0 THEN ZF := 1; register := UNDEFINED; ELSE ZF := 0; register := 0; temp := r/m; IF OperandSize = 32 THEN IF (temp & 0xFFFF0000) != 0 THEN temp >>= 16; register |= 16; FI; FI; IF (temp & 0xFF00) != 0 THEN temp >>= 8; register |= 8; FI; IF (temp & 0xF0) != 0 THEN temp >>= 4; register |= 4; FI; IF (temp & 0xC) != 0 THEN temp >>= 2; register |= 2; FI; register |= (temp>>1); FI;

19 years, 6 months

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