Use only one access to the spinlock in the assertion, because the value
may change between two access' on smp machines.
Modified: trunk/reactos/ntoskrnl/ke/spinlock.c
_____
Modified: trunk/reactos/ntoskrnl/ke/spinlock.c
--- trunk/reactos/ntoskrnl/ke/spinlock.c 2005-03-13 09:10:36 UTC
(rev 13999)
+++ trunk/reactos/ntoskrnl/ke/spinlock.c 2005-03-13 09:14:59 UTC
(rev 14000)
@@ -178,7 +178,7 @@
* FIXME: This depends on gcc assembling this test to a single load
from
* the spinlock's value.
*/
- ASSERT(*SpinLock == 0 || *SpinLock == 1);
+ ASSERT(*SpinLock < 2);
while ((i = InterlockedExchangeUL(SpinLock, 1)) == 1)
{
Ignore exception 15 in KiTrapHandler.
Modified: trunk/reactos/ntoskrnl/ke/i386/exp.c
_____
Modified: trunk/reactos/ntoskrnl/ke/i386/exp.c
--- trunk/reactos/ntoskrnl/ke/i386/exp.c 2005-03-13 09:08:26 UTC
(rev 13998)
+++ trunk/reactos/ntoskrnl/ke/i386/exp.c 2005-03-13 09:10:36 UTC
(rev 13999)
@@ -509,6 +509,21 @@
ExceptionNr = 12;
}
+ if (ExceptionNr == 15)
+ {
+ /*
+ * FIXME:
+ * This exception should never occur. The P6 has a bug, which
does sometimes deliver
+ * the apic spurious interrupt as exception 15. On an
athlon64, I get one exception
+ * in the early boot phase in apic mode (using the smp build).
I've looked to the linux
+ * sources. Linux does ignore this exception.
+ *
+ * Hartmut Birr
+ */
+ DPRINT1("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
+ return(0);
+ }
+
/*
* Maybe handle the page fault and return
*/