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ros-diffs@reactos.org
19 participants
447 discussions
Start a n
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ew thread
[ion] 23658: - Deliver APCs through a proper interrupt gate as well.
by ion@svn.reactos.org
Author: ion Date: Wed Aug 23 04:51:08 2006 New Revision: 23658 URL:
http://svn.reactos.org/svn/reactos?rev=23658&view=rev
Log: - Deliver APCs through a proper interrupt gate as well. Modified: trunk/reactos/hal/halx86/generic/irql.c Modified: trunk/reactos/hal/halx86/generic/irql.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irql.c?…
============================================================================== --- trunk/reactos/hal/halx86/generic/irql.c (original) +++ trunk/reactos/hal/halx86/generic/irql.c Wed Aug 23 04:51:08 2006 @@ -24,6 +24,7 @@ }; VOID HalpDispatchInterrupt(VOID); +VOID HalpApcInterrupt(VOID); /* FUNCTIONS ****************************************************************/ @@ -69,8 +70,7 @@ { if (Table[KeGetPcr()->IRR] == APC_LEVEL) { - KeGetPcr()->IRR &= ~2; - KiDeliverApc(KernelMode, NULL, NULL); + HalpApcInterrupt(); } } KeGetPcr()->Irql = PASSIVE_LEVEL;
18 years, 4 months
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[ion] 23657: - Call KiDispatchInterrupt through an interrupt gate instead of directly.
by ion@svn.reactos.org
Author: ion Date: Wed Aug 23 04:49:35 2006 New Revision: 23657 URL:
http://svn.reactos.org/svn/reactos?rev=23657&view=rev
Log: - Call KiDispatchInterrupt through an interrupt gate instead of directly. Modified: trunk/reactos/hal/halx86/generic/irq.S trunk/reactos/hal/halx86/generic/irql.c Modified: trunk/reactos/hal/halx86/generic/irq.S URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irq.S?r…
============================================================================== --- trunk/reactos/hal/halx86/generic/irq.S (original) +++ trunk/reactos/hal/halx86/generic/irq.S Wed Aug 23 04:49:35 2006 @@ -626,14 +626,15 @@ SoftwareInt: /* Check if there are pending software interrupts */ mov [fs:KPCR_IRQL], cl +#if 0 mov eax, [fs:KPCR_IDR] mov al, SoftIntByteTable[eax] cmp al, cl ja DoCall2 +#endif ret 4 DoCall2: - /* There are pending softwate interrupts, call their handlers */ add esp, 8 jmp SoftIntHandlerTable2[eax*4] Modified: trunk/reactos/hal/halx86/generic/irql.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irql.c?…
============================================================================== --- trunk/reactos/hal/halx86/generic/irql.c (original) +++ trunk/reactos/hal/halx86/generic/irql.c Wed Aug 23 04:49:35 2006 @@ -22,6 +22,8 @@ 1, 1, 2, 2, 2, 2 }; + +VOID HalpDispatchInterrupt(VOID); /* FUNCTIONS ****************************************************************/ @@ -55,8 +57,7 @@ { if (Table[KeGetPcr()->IRR] == DISPATCH_LEVEL) { - KeGetPcr()->IRR &= ~4; - KiDispatchInterrupt(); + HalpDispatchInterrupt(); } } KeGetPcr()->Irql = APC_LEVEL;
18 years, 4 months
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[ion] 23656: - Remove HalpEndSystemInterrupt since we were already doing that code in HalpLowerIrql.
by ion@svn.reactos.org
Author: ion Date: Wed Aug 23 04:39:52 2006 New Revision: 23656 URL:
http://svn.reactos.org/svn/reactos?rev=23656&view=rev
Log: - Remove HalpEndSystemInterrupt since we were already doing that code in HalpLowerIrql. Modified: trunk/reactos/hal/halx86/generic/irql.c Modified: trunk/reactos/hal/halx86/generic/irql.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irql.c?…
============================================================================== --- trunk/reactos/hal/halx86/generic/irql.c (original) +++ trunk/reactos/hal/halx86/generic/irql.c Wed Aug 23 04:39:52 2006 @@ -26,27 +26,6 @@ /* FUNCTIONS ****************************************************************/ extern ULONG KiI8259MaskTable[]; - -VOID HalpEndSystemInterrupt(KIRQL Irql) -/* - * FUNCTION: Enable all irqs with higher priority. - */ -{ - ULONG flags; - ULONG Mask; - - /* Interrupts should be disable while enabling irqs of both pics */ - Ki386SaveFlags(flags); - Ki386DisableInterrupts(); - - Mask = KeGetPcr()->IDR | KiI8259MaskTable[Irql]; - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)Mask); - Mask >>= 8; - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); - - /* restore flags */ - Ki386RestoreFlags(flags); -} VOID STATIC HalpLowerIrql(KIRQL NewIrql) @@ -136,7 +115,6 @@ { //DPRINT1("ENDING: %lx %lx\n", Irql, Unknown2); HalpLowerIrql(Irql); - HalpEndSystemInterrupt(Irql); } /* EOF */
18 years, 4 months
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[ion] 23655: - Use the IRR to determine APC delivery.
by ion@svn.reactos.org
Author: ion Date: Wed Aug 23 03:41:39 2006 New Revision: 23655 URL:
http://svn.reactos.org/svn/reactos?rev=23655&view=rev
Log: - Use the IRR to determine APC delivery. Modified: trunk/reactos/hal/halx86/generic/irql.c Modified: trunk/reactos/hal/halx86/generic/irql.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irql.c?…
============================================================================== --- trunk/reactos/hal/halx86/generic/irql.c (original) +++ trunk/reactos/hal/halx86/generic/irql.c Wed Aug 23 03:41:39 2006 @@ -60,6 +60,7 @@ Mask >>= 8; WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); } + if (NewIrql >= PROFILE_LEVEL) { KeGetPcr()->Irql = NewIrql; @@ -73,18 +74,24 @@ KeGetPcr()->Irql = DISPATCH_LEVEL; if (Table[KeGetPcr()->IRR] >= NewIrql) { - KeGetPcr()->IRR &= ~4; - KiDispatchInterrupt(); + if (Table[KeGetPcr()->IRR] == DISPATCH_LEVEL) + { + KeGetPcr()->IRR &= ~4; + KiDispatchInterrupt(); + } } KeGetPcr()->Irql = APC_LEVEL; if (NewIrql == APC_LEVEL) { return; } - if (KeGetCurrentThread() != NULL && - KeGetCurrentThread()->ApcState.KernelApcPending) + if (Table[KeGetPcr()->IRR] >= NewIrql) { + if (Table[KeGetPcr()->IRR] == APC_LEVEL) + { + KeGetPcr()->IRR &= ~2; KiDeliverApc(KernelMode, NULL, NULL); + } } KeGetPcr()->Irql = PASSIVE_LEVEL; }
18 years, 4 months
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[ion] 23654: - Add the code necessary in the C version of KeLowerIRql to properly mask the PIC, and enable #ifed code in ASM KeRaiseIrql to mask the PIC, since it now works.
by ion@svn.reactos.org
Author: ion Date: Wed Aug 23 02:45:45 2006 New Revision: 23654 URL:
http://svn.reactos.org/svn/reactos?rev=23654&view=rev
Log: - Add the code necessary in the C version of KeLowerIRql to properly mask the PIC, and enable #ifed code in ASM KeRaiseIrql to mask the PIC, since it now works. Modified: trunk/reactos/hal/halx86/generic/irq.S trunk/reactos/hal/halx86/generic/irql.c Modified: trunk/reactos/hal/halx86/generic/irq.S URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irq.S?r…
============================================================================== --- trunk/reactos/hal/halx86/generic/irq.S (original) +++ trunk/reactos/hal/halx86/generic/irq.S Wed Aug 23 02:45:45 2006 @@ -464,14 +464,12 @@ /* Set the new IRQL */ mov [fs:KPCR_IRQL], cl -#if 0 /* Mask the interrupts in the PIC */ mov eax, _KiI8259MaskTable[ecx*4] or eax, [fs:KPCR_IDR] out 0x21, al shr eax, 8 out 0xA1, al -#endif /* Restore interrupts and return old IRQL */ popf Modified: trunk/reactos/hal/halx86/generic/irql.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irql.c?…
============================================================================== --- trunk/reactos/hal/halx86/generic/irql.c (original) +++ trunk/reactos/hal/halx86/generic/irql.c Wed Aug 23 02:45:45 2006 @@ -51,6 +51,15 @@ VOID STATIC HalpLowerIrql(KIRQL NewIrql) { + ULONG Mask; + + if (KeGetPcr()->Irql > DISPATCH_LEVEL) + { + Mask = KeGetPcr()->IDR | KiI8259MaskTable[NewIrql]; + WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)Mask); + Mask >>= 8; + WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); + } if (NewIrql >= PROFILE_LEVEL) { KeGetPcr()->Irql = NewIrql; @@ -112,6 +121,7 @@ HalpLowerIrql(NewIrql); } + VOID STDCALL HalEndSystemInterrupt (KIRQL Irql, ULONG Unknown2) /* * FUNCTION: Finish a system interrupt and restore the specified irq level.
18 years, 4 months
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[ion] 23653: - Get rid of the peculiar idea that the HAL should manually hack into ntoskrnl through a hack export and hackishly call the registered device interrupt handlers. This is why computers have a PIC in the first place...
by ion@svn.reactos.org
Author: ion Date: Wed Aug 23 02:20:02 2006 New Revision: 23653 URL:
http://svn.reactos.org/svn/reactos?rev=23653&view=rev
Log: - Get rid of the peculiar idea that the HAL should manually hack into ntoskrnl through a hack export and hackishly call the registered device interrupt handlers. This is why computers have a PIC in the first place... Modified: trunk/reactos/hal/halx86/generic/irql.c trunk/reactos/ntoskrnl/ntoskrnl.def Modified: trunk/reactos/hal/halx86/generic/irql.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irql.c?…
============================================================================== --- trunk/reactos/hal/halx86/generic/irql.c (original) +++ trunk/reactos/hal/halx86/generic/irql.c Wed Aug 23 02:20:02 2006 @@ -16,24 +16,12 @@ /* GLOBALS ******************************************************************/ -/* - * FIXME: Use EISA_CONTROL STRUCTURE INSTEAD OF HARD-CODED OFFSETS -*/ - UCHAR Table[8] = { 0, 0, 1, 1, 2, 2, 2, 2 }; - -static ULONG HalpPendingInterruptCount[NR_IRQS] = {0}; - -#define DIRQL_TO_IRQ(x) (PROFILE_LEVEL - x) -#define IRQ_TO_DIRQL(x) (PROFILE_LEVEL - x) - -VOID STDCALL -KiInterruptDispatch2 (ULONG Irq, KIRQL old_level); /* FUNCTIONS ****************************************************************/ @@ -61,38 +49,6 @@ } VOID STATIC -HalpExecuteIrqs(KIRQL NewIrql) -{ - ULONG IrqLimit, i; - - IrqLimit = min(PROFILE_LEVEL - NewIrql, NR_IRQS); - - /* - * For each irq if there have been any deferred interrupts then now - * dispatch them. - */ - for (i = 0; i < IrqLimit; i++) - { - if (HalpPendingInterruptCount[i] > 0) - { - KeGetPcr()->Irql = (KIRQL)IRQ_TO_DIRQL(i); - - while (HalpPendingInterruptCount[i] > 0) - { - /* - * For each deferred interrupt execute all the handlers at DIRQL. - */ - HalpPendingInterruptCount[i]--; - KiInterruptDispatch2(i + IRQ_BASE, NewIrql); - } - KeGetPcr()->Irql--; - HalpEndSystemInterrupt(KeGetPcr()->Irql); - } - } - -} - -VOID STATIC HalpLowerIrql(KIRQL NewIrql) { if (NewIrql >= PROFILE_LEVEL) @@ -100,7 +56,6 @@ KeGetPcr()->Irql = NewIrql; return; } - HalpExecuteIrqs(NewIrql); if (NewIrql >= DISPATCH_LEVEL) { KeGetPcr()->Irql = NewIrql; Modified: trunk/reactos/ntoskrnl/ntoskrnl.def URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ntoskrnl.def?rev=…
============================================================================== --- trunk/reactos/ntoskrnl/ntoskrnl.def (original) +++ trunk/reactos/ntoskrnl/ntoskrnl.def Wed Aug 23 02:20:02 2006 @@ -664,7 +664,6 @@ KiDeliverApc@12 KiDispatchInterrupt@0 KiEnableTimerWatchdog -KiInterruptDispatch2@8 KiIpiServiceRoutine@8 @KiReleaseSpinLock@4 KiUnexpectedInterrupt
18 years, 4 months
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[ion] 23652: - Switch to ASM version of HalEnableSystemInterrupt
by ion@svn.reactos.org
Author: ion Date: Wed Aug 23 02:13:01 2006 New Revision: 23652 URL:
http://svn.reactos.org/svn/reactos?rev=23652&view=rev
Log: - Switch to ASM version of HalEnableSystemInterrupt Modified: trunk/reactos/hal/halx86/generic/irq.S trunk/reactos/hal/halx86/generic/irql.c Modified: trunk/reactos/hal/halx86/generic/irq.S URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irq.S?r…
============================================================================== --- trunk/reactos/hal/halx86/generic/irq.S (original) +++ trunk/reactos/hal/halx86/generic/irq.S Wed Aug 23 02:13:01 2006 @@ -220,13 +220,11 @@ ret 8 .endfunc -#if 0 .globl _HalEnableSystemInterrupt@12 .func HalEnableSystemInterrupt@12 _HalEnableSystemInterrupt@12: /* Get the vector and validate it */ - jmp $ movzx ecx, byte ptr [esp+4] sub ecx, PRIMARY_VECTOR_BASE jb Invalid @@ -290,7 +288,6 @@ xor eax, eax ret 12 .endfunc -#endif .globl _HalBeginSystemInterrupt@12 .func HalBeginSystemInterrupt@12 Modified: trunk/reactos/hal/halx86/generic/irql.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irql.c?…
============================================================================== --- trunk/reactos/hal/halx86/generic/irql.c (original) +++ trunk/reactos/hal/halx86/generic/irql.c Wed Aug 23 02:13:01 2006 @@ -167,30 +167,4 @@ HalpEndSystemInterrupt(Irql); } -BOOLEAN -STDCALL -HalEnableSystemInterrupt( - ULONG Vector, - KIRQL Irql, - KINTERRUPT_MODE InterruptMode) -{ - ULONG irq; - ULONG Mask; - - if (Vector < IRQ_BASE || Vector >= IRQ_BASE + NR_IRQS) - return FALSE; - - irq = Vector - IRQ_BASE; - KeGetPcr()->IDR &= ~(1 << irq); - - Mask = KeGetPcr()->IDR | KiI8259MaskTable[KeGetPcr()->Irql]; - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)Mask); - Mask >>= 8; - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); - - return TRUE; -} - - - /* EOF */
18 years, 4 months
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[ion] 23651: - Use the IDR in the PCR intead of a local picmask. - Use ASM version of HalBeginSystemInterrupt.
by ion@svn.reactos.org
Author: ion Date: Wed Aug 23 02:10:52 2006 New Revision: 23651 URL:
http://svn.reactos.org/svn/reactos?rev=23651&view=rev
Log: - Use the IDR in the PCR intead of a local picmask. - Use ASM version of HalBeginSystemInterrupt. Modified: trunk/reactos/hal/halx86/generic/irq.S trunk/reactos/hal/halx86/generic/irql.c trunk/reactos/hal/halx86/up/halinit_up.c trunk/reactos/include/ndk/asm.h Modified: trunk/reactos/hal/halx86/generic/irq.S URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irq.S?r…
============================================================================== --- trunk/reactos/hal/halx86/generic/irq.S (original) +++ trunk/reactos/hal/halx86/generic/irq.S Wed Aug 23 02:10:52 2006 @@ -70,7 +70,6 @@ .long 0xFFFFFFFB /* IRQL 30 */ .long 0xFFFFFFFB /* IRQL 31 */ -#if 0 HalpSysIntHandler: .rept 8 .long GenericIRQ /* IRQ 0-7 */ @@ -83,7 +82,6 @@ .rept 20 .long GenericIRQ /* IRQ 16-35 */ .endr -#endif SoftIntByteTable: .byte PASSIVE_LEVEL /* IRR 0 */ @@ -202,7 +200,7 @@ mov edx, 1 shl edx, cl cli - or [fs+KPCR_IDR], edx + or [fs:KPCR_IDR], edx /* Get the current mask */ xor eax, eax @@ -292,18 +290,18 @@ xor eax, eax ret 12 .endfunc +#endif .globl _HalBeginSystemInterrupt@12 .func HalBeginSystemInterrupt@12 _HalBeginSystemInterrupt@12: /* Convert to vector and call the handler */ - movzx ebx, byte ptr [esp+8] - sub ebx, PRIMARY_VECTOR_BASE - jmp HalpSysIntHandler[ebx*4] + mov edx, [esp+8] + sub edx, PRIMARY_VECTOR_BASE + jmp HalpSysIntHandler[edx*4] IRQ15: - /* This is IRQ 15, check if it's spurious */ mov al, 0xB out 0xA0, al @@ -318,7 +316,6 @@ ret 12 IRQ7: - /* This is IRQ 7, check if it's spurious */ mov al, 0xB out 0x20, al @@ -331,10 +328,9 @@ ret 12 GenericIRQ: - /* Return the current IRQL */ mov eax, [esp+12] - movzx ecx, word ptr [fs:KPCR_IRQL] + movzx ecx, byte ptr [fs:KPCR_IRQL] mov [eax], cl /* Set the new IRQL */ @@ -349,7 +345,7 @@ out 0xA1, al /* Check to which PIC the EOI was sent */ - mov eax, ebx + mov eax, edx cmp eax, 8 jnb Pic1 @@ -366,7 +362,6 @@ out 0x20, al DoneBegin: - /* Enable interrupts and return TRUE */ in al, 0x21 sti @@ -374,6 +369,7 @@ ret 12 .endfunc +#if 0 .globl _HalEndSystemInterrupt@8 .func HalEndSystemInterrupt@8 _HalEndSystemInterrupt@8: Modified: trunk/reactos/hal/halx86/generic/irql.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irql.c?…
============================================================================== --- trunk/reactos/hal/halx86/generic/irql.c (original) +++ trunk/reactos/hal/halx86/generic/irql.c Wed Aug 23 02:10:52 2006 @@ -12,6 +12,7 @@ #include <hal.h> #define NDEBUG #include <debug.h> +#include <ndk/asm.h> /* GLOBALS ******************************************************************/ @@ -25,8 +26,6 @@ 1, 1, 2, 2, 2, 2 }; - -ULONG pic_mask = {0xFFFFFFFA}; static ULONG HalpPendingInterruptCount[NR_IRQS] = {0}; @@ -52,7 +51,7 @@ Ki386SaveFlags(flags); Ki386DisableInterrupts(); - Mask = pic_mask | KiI8259MaskTable[Irql]; + Mask = KeGetPcr()->IDR | KiI8259MaskTable[Irql]; WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)Mask); Mask >>= 8; WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); @@ -158,44 +157,6 @@ HalpLowerIrql(NewIrql); } - -BOOLEAN STDCALL -HalBeginSystemInterrupt (KIRQL Irql, - ULONG Vector, - PKIRQL OldIrql) -{ - ULONG irq; - ULONG Mask; - - if (Vector < IRQ_BASE || Vector >= IRQ_BASE + NR_IRQS) - { - return(FALSE); - } - irq = Vector - IRQ_BASE; - - Mask = pic_mask | KiI8259MaskTable[Irql]; - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)Mask); - Mask >>= 8; - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); - - if (irq < 8) - { - WRITE_PORT_UCHAR((PUCHAR)0x20, 0x60 | irq); - } - else - { - /* Send EOI to the PICs */ - WRITE_PORT_UCHAR((PUCHAR)0x20,0x62); - WRITE_PORT_UCHAR((PUCHAR)0xa0,0x20); - } - - *OldIrql = KeGetPcr()->Irql; - KeGetPcr()->Irql = Irql; - - return(TRUE); -} - - VOID STDCALL HalEndSystemInterrupt (KIRQL Irql, ULONG Unknown2) /* * FUNCTION: Finish a system interrupt and restore the specified irq level. @@ -220,9 +181,9 @@ return FALSE; irq = Vector - IRQ_BASE; - pic_mask &= ~(1 << irq); + KeGetPcr()->IDR &= ~(1 << irq); - Mask = pic_mask | KiI8259MaskTable[KeGetPcr()->Irql]; + Mask = KeGetPcr()->IDR | KiI8259MaskTable[KeGetPcr()->Irql]; WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)Mask); Mask >>= 8; WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); Modified: trunk/reactos/hal/halx86/up/halinit_up.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/up/halinit_up.c…
============================================================================== --- trunk/reactos/hal/halx86/up/halinit_up.c (original) +++ trunk/reactos/hal/halx86/up/halinit_up.c Wed Aug 23 02:10:52 2006 @@ -21,6 +21,8 @@ HalpInitPhase0(PROS_LOADER_PARAMETER_BLOCK LoaderBlock) { HalpInitPICs(); + /* FIXME: Big-ass hack. First, should be 0xFFFFFFFF, second, shouldnt' be done here */ + KeGetPcr()->IDR = 0xFFFFFFFA; /* Setup busy waiting */ HalpCalibrateStallExecution(); Modified: trunk/reactos/include/ndk/asm.h URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/include/ndk/asm.h?rev=2365…
============================================================================== --- trunk/reactos/include/ndk/asm.h (original) +++ trunk/reactos/include/ndk/asm.h Wed Aug 23 02:10:52 2006 @@ -432,19 +432,15 @@ #define MACHINE_TYPE_MCA 0x0002 // -// Vector base -// ROS HACK HACK HACK -// -#define PRIMARY_VECTOR_BASE 0x40 - -// // Kernel Feature Bits // #define KF_RDTSC 0x00000002 #endif + // // Generic Definitions // +#define PRIMARY_VECTOR_BASE 0x40 // FIXME: HACK #define MAXIMUM_IDTVECTOR 0xFF #endif // !_ASM_H
18 years, 4 months
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[fireball] 23650: Dmitry Philippov: - Add a test case for a multisz value which has zero-sized strings - Add a test case for query registry delete All tests are known to be passed on Windows XP SP2
by fireball@svn.reactos.org
Author: fireball Date: Wed Aug 23 01:45:57 2006 New Revision: 23650 URL:
http://svn.reactos.org/svn/reactos?rev=23650&view=rev
Log: Dmitry Philippov: - Add a test case for a multisz value which has zero-sized strings - Add a test case for query registry delete All tests are known to be passed on Windows XP SP2 Modified: trunk/reactos/regtests/winetests/ntdll/reg.c Modified: trunk/reactos/regtests/winetests/ntdll/reg.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/regtests/winetests/ntdll/r…
============================================================================== --- trunk/reactos/regtests/winetests/ntdll/reg.c (original) +++ trunk/reactos/regtests/winetests/ntdll/reg.c Wed Aug 23 01:45:57 2006 @@ -2,6 +2,7 @@ * * Copyright 2003 Thomas Mertes * Copyright 2005 Brad DeMorrow + * Copyright 2006 Dmitry Philippov * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public @@ -84,16 +85,18 @@ static NTSTATUS (WINAPI * pNtDeleteValueKey)(IN HANDLE, IN PUNICODE_STRING); static NTSTATUS (WINAPI * pRtlQueryRegistryValues)(IN ULONG, IN PCWSTR,IN PRTL_QUERY_REGISTRY_TABLE, IN PVOID,IN PVOID); static NTSTATUS (WINAPI * pRtlCheckRegistryKey)(IN ULONG,IN PWSTR); -static NTSTATUS (WINAPI * pRtlOpenCurrentUser)(IN ACCESS_MASK, OUT PHKEY); +static NTSTATUS (WINAPI * pRtlOpenCurrentUser)(IN ACCESS_MASK, OUT PHANDLE); static NTSTATUS (WINAPI * pNtOpenKey)(PHANDLE, IN ACCESS_MASK, IN POBJECT_ATTRIBUTES); static NTSTATUS (WINAPI * pNtClose)(IN HANDLE); static NTSTATUS (WINAPI * pNtDeleteValueKey)(IN HANDLE, IN PUNICODE_STRING); -static NTSTATUS (WINAPI * pNtDeleteKey)(HKEY); -static NTSTATUS (WINAPI * pNtCreateKey)( PHKEY retkey, ACCESS_MASK access, const OBJECT_ATTRIBUTES *attr, +static NTSTATUS (WINAPI * pNtDeleteKey)(HANDLE); +static NTSTATUS (WINAPI * pNtCreateKey)( PHANDLE retkey, ACCESS_MASK access, const OBJECT_ATTRIBUTES *attr, ULONG TitleIndex, const UNICODE_STRING *class, ULONG options, PULONG dispos ); -static NTSTATUS (WINAPI * pNtSetValueKey)( PHKEY, const PUNICODE_STRING, ULONG, +static NTSTATUS (WINAPI * pNtSetValueKey)( HANDLE, const PUNICODE_STRING, ULONG, ULONG, const PVOID, ULONG ); +static NTSTATUS (WINAPI * pNtQueryValueKey)( HANDLE,const UNICODE_STRING *,KEY_VALUE_INFORMATION_CLASS, + void *,DWORD,DWORD * ); static NTSTATUS (WINAPI * pRtlFormatCurrentUserKeyPath)(PUNICODE_STRING); static NTSTATUS (WINAPI * pRtlCreateUnicodeString)( PUNICODE_STRING, LPCWSTR); static NTSTATUS (WINAPI * pRtlReAllocateHeap)(IN PVOID, IN ULONG, IN PVOID, IN ULONG); @@ -136,6 +139,7 @@ NTDLL_GET_PROC(NtCreateKey) NTDLL_GET_PROC(NtDeleteKey) NTDLL_GET_PROC(NtSetValueKey) + NTDLL_GET_PROC(NtQueryValueKey) NTDLL_GET_PROC(NtOpenKey) NTDLL_GET_PROC(RtlFormatCurrentUserKeyPath) NTDLL_GET_PROC(RtlReAllocateHeap) @@ -153,8 +157,9 @@ IN ULONG ValueLength, IN PVOID Context, IN PVOID EntryContext) { NTSTATUS ret = STATUS_SUCCESS; + LPSTR ValName = 0; + LPSTR ValData = 0; int ValueNameLength = 0; - LPSTR ValName = 0; trace("**Test %d**\n", CurrentTest); if(ValueName) @@ -163,12 +168,19 @@ ValName = (LPSTR)pRtlAllocateHeap(GetProcessHeap(), 0, ValueNameLength); - WideCharToMultiByte(0, 0, ValueName, ValueNameLength+1,ValName, ValueNameLength, 0, 0); trace("ValueName: %s\n", ValName); } else trace("ValueName: (null)\n"); + + if( ValueType == REG_SZ || + ValueType == REG_MULTI_SZ || + ValueType == REG_EXPAND_SZ ) + { + ValData = (LPSTR)pRtlAllocateHeap(GetProcessHeap(), 0, ValueLength); + WideCharToMultiByte(0, 0, ValueData, ValueLength, ValData, ValueLength, 0, 0); + } switch(ValueType) { @@ -184,17 +196,17 @@ case REG_SZ: trace("ValueType: REG_SZ\n"); - trace("ValueData: %s\n", (char*)ValueData); + trace("ValueData: %s\n", ValData); break; case REG_MULTI_SZ: trace("ValueType: REG_MULTI_SZ\n"); - trace("ValueData: %s\n", (char*)ValueData); + trace("ValueData: %s", (char*)ValData); break; case REG_EXPAND_SZ: trace("ValueType: REG_EXPAND_SZ\n"); - trace("ValueData: %s\n", (char*)ValueData); + trace("ValueData: %s\n", (char*)ValData); break; case REG_DWORD: @@ -213,6 +225,9 @@ if(ValName) pRtlFreeHeap(GetProcessHeap(), 0, ValName); + + if(ValData) + pRtlFreeHeap(GetProcessHeap(), 0, ValData); return ret; } @@ -269,14 +284,14 @@ QueryTable[0].DefaultLength = 100; QueryTable[1].QueryRoutine = QueryRoutine; - QueryTable[1].Flags = 0; - QueryTable[1].Name = NULL; + QueryTable[1].Flags = RTL_QUERY_REGISTRY_DELETE; + QueryTable[1].Name = L"multisztest"; QueryTable[1].EntryContext = 0; QueryTable[1].DefaultType = REG_NONE; QueryTable[1].DefaultData = NULL; QueryTable[1].DefaultLength = 0; - QueryTable[2].QueryRoutine = NULL; + QueryTable[2].QueryRoutine = QueryRoutine; QueryTable[2].Flags = 0; QueryTable[2].Name = NULL; QueryTable[2].EntryContext = 0; @@ -294,7 +309,7 @@ { /*Create WineTest*/ OBJECT_ATTRIBUTES attr; - HKEY key; + HANDLE key; ACCESS_MASK am = GENERIC_ALL; NTSTATUS status; @@ -302,7 +317,7 @@ status = pNtCreateKey(&key, am, &attr, 0, 0, 0, 0); ok(status == STATUS_SUCCESS, "NtCreateKey Failed: 0x%08lx\n", status); - pNtClose(&key); + pNtClose(key); } static void test_NtSetValueKey(void) @@ -312,10 +327,14 @@ OBJECT_ATTRIBUTES attr; ACCESS_MASK am = KEY_WRITE; UNICODE_STRING ValName; + UNICODE_STRING ValNameMultiSz; DWORD data = 711; + static const WCHAR DataMultiSz[] = {'T','e','s','t','V','a','l','u','e','1',0, + 'T','e','s','t','V','a','l','u','e','2',0, + 'T','e','s','t','V','a','l','u','e','3',0,0, + 'T','e','s','t','V','a','l','u','e','5',0,0,0}; pRtlCreateUnicodeStringFromAsciiz(&ValName, "deletetest"); - InitializeObjectAttributes(&attr, &winetestpath, 0, 0, 0); status = pNtOpenKey(&key, am, &attr); ok(status == STATUS_SUCCESS, "NtOpenKey Failed: 0x%08lx\n", status); @@ -324,16 +343,24 @@ ok(status == STATUS_SUCCESS, "NtSetValueKey Failed: 0x%08lx\n", status); pRtlFreeUnicodeString(&ValName); - pNtClose(&key); + + pRtlCreateUnicodeStringFromAsciiz(&ValNameMultiSz, "multisztest"); + + status = pNtSetValueKey(key, &ValNameMultiSz, 0, REG_MULTI_SZ, (PVOID)DataMultiSz, sizeof(DataMultiSz)); + ok(status == STATUS_SUCCESS, "NtSetValueKey Failed: 0x%08lx\n", status); + + pRtlFreeUnicodeString(&ValNameMultiSz); + + pNtClose(key); } static void test_RtlOpenCurrentUser(void) { NTSTATUS status; - HKEY handle; + HANDLE handle; status=pRtlOpenCurrentUser(KEY_READ, &handle); ok(status == STATUS_SUCCESS, "RtlOpenCurrentUser Failed: 0x%08lx\n", status); - pNtClose(&handle); + pNtClose(handle); } static void test_RtlCheckRegistryKey(void) @@ -345,6 +372,29 @@ status = pRtlCheckRegistryKey((RTL_REGISTRY_ABSOLUTE | RTL_REGISTRY_OPTIONAL), winetestpath.Buffer); ok(status == STATUS_SUCCESS, "RtlCheckRegistryKey with RTL_REGISTRY_ABSOLUTE and RTL_REGISTRY_OPTIONAL: 0x%08lx\n", status); +} + +static void test_RtlQueryRegistryDelete(void) +{ + HANDLE key; + NTSTATUS status; + OBJECT_ATTRIBUTES attr; + UNICODE_STRING ValNameMultiSz; + WCHAR sBuf[255]; + DWORD ValueSize; + + InitializeObjectAttributes(&attr, &winetestpath, 0, 0, 0); + status = pNtOpenKey(&key, KEY_READ, &attr); + ok(status == STATUS_SUCCESS, "NtOpenKey Failed: 0x%08lx\n", status); + + pRtlCreateUnicodeStringFromAsciiz(&ValNameMultiSz, "multisztest"); + + status = pNtQueryValueKey(key, &ValNameMultiSz, 0, (void*)sBuf, sizeof(sBuf), &ValueSize); + ok(status == STATUS_OBJECT_NAME_NOT_FOUND, "NtOpenKey returns: 0x%08lx instead of STATUS_OBJECT_NAME_NOT_FOUND\n", status); + + pRtlFreeUnicodeString(&ValNameMultiSz); + + pNtClose(key); } static void test_NtDeleteKey(void) @@ -359,6 +409,8 @@ status = pNtDeleteKey(hkey); ok(status == STATUS_SUCCESS, "NtDeleteKey Failed: 0x%08lx\n", status); + + pNtClose(hkey); } START_TEST(reg) @@ -378,6 +430,7 @@ test_RtlCheckRegistryKey(); test_RtlOpenCurrentUser(); test_RtlQueryRegistryValues(); + test_RtlQueryRegistryDelete(); test_NtDeleteKey(); pRtlFreeUnicodeString(&winetestpath);
18 years, 4 months
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[ion] 23649: - Commit current work on IRQ rewrite. Currently in a very ugly/dirty state of flux between the new ASM code (with tiny hacks) and the old C code (with giant hacks). I feel that this is a good/stable middle ground before continuing further with the changes.
by ion@svn.reactos.org
Author: ion Date: Wed Aug 23 00:50:52 2006 New Revision: 23649 URL:
http://svn.reactos.org/svn/reactos?rev=23649&view=rev
Log: - Commit current work on IRQ rewrite. Currently in a very ugly/dirty state of flux between the new ASM code (with tiny hacks) and the old C code (with giant hacks). I feel that this is a good/stable middle ground before continuing further with the changes. Added: trunk/reactos/hal/halx86/generic/irq.S Modified: trunk/reactos/hal/halx86/generic/generic.rbuild trunk/reactos/hal/halx86/generic/irql.c trunk/reactos/hal/halx86/generic/spinlock.c trunk/reactos/hal/halx86/include/halp.h trunk/reactos/include/ndk/asm.h trunk/reactos/ntoskrnl/ex/init.c Modified: trunk/reactos/hal/halx86/generic/generic.rbuild URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/generic…
============================================================================== --- trunk/reactos/hal/halx86/generic/generic.rbuild (original) +++ trunk/reactos/hal/halx86/generic/generic.rbuild Wed Aug 23 00:50:52 2006 @@ -32,6 +32,7 @@ <define name="__USE_W32API" /> <file>ipi.c</file> <file>irql.c</file> + <file>irq.S</file> <file>processor.c</file> <file>resource.c</file> <file>spinlock.c</file> Added: trunk/reactos/hal/halx86/generic/irq.S URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irq.S?r…
============================================================================== --- trunk/reactos/hal/halx86/generic/irq.S (added) +++ trunk/reactos/hal/halx86/generic/irq.S Wed Aug 23 00:50:52 2006 @@ -1,0 +1,649 @@ +/* + * FILE: hal/halx86/generic/irql.S + * COPYRIGHT: See COPYING in the top level directory + * PURPOSE: Software, System and Hardware IRQ Management + * PROGRAMMER: Alex Ionescu (alex(a)relsoft.net) + */ + +/* INCLUDES ******************************************************************/ + +#include <asm.h> +#include <internal/i386/asmmacro.S> +.intel_syntax noprefix + +.extern _Kei386EoiHelper@0 +.extern _KiUnexpectedInterrupt + +/* GLOBALS *******************************************************************/ + +PICInitTable: + + /* Master PIC */ + .short 0x20 /* Port */ + .byte 0x11 /* Edge,, cascade, CAI 8, ICW4 */ + .byte 0x40 /* Base */ + .byte 4 /* IRQ 4 connected to slave */ + .byte 1 /* Non buffered, not nested, 8086 */ + + /* Slave PIC */ + .short 0xA0 /* Port */ + .byte 0x11 /* Edge, cascade, CAI 8, ICW4 */ + .byte 0x48 /* Base */ + .byte 2 /* Slave ID: Slave 2 */ + .byte 1 /* Non buffered, not nested, 8086 */ + + /* End of initialization table */ + .short 0 + +.globl _KiI8259MaskTable +_KiI8259MaskTable: + .long 0 /* IRQL 0 */ + .long 0 /* IRQL 1 */ + .long 0 /* IRQL 2 */ + .long 0 /* IRQL 3 */ + .long 0xFF800000 /* IRQL 4 */ + .long 0xFFC00000 /* IRQL 5 */ + .long 0xFFE00000 /* IRQL 6 */ + .long 0xFFF00000 /* IRQL 7 */ + .long 0xFFF80000 /* IRQL 8 */ + .long 0xFFFC0000 /* IRQL 9 */ + .long 0xFFFE0000 /* IRQL 10 */ + .long 0xFFFF0000 /* IRQL 11 */ + .long 0xFFFF8000 /* IRQL 12 */ + .long 0xFFFFC000 /* IRQL 13 */ + .long 0xFFFFE000 /* IRQL 14 */ + .long 0xFFFFF000 /* IRQL 15 */ + .long 0xFFFFF800 /* IRQL 16 */ + .long 0xFFFFFC00 /* IRQL 17 */ + .long 0xFFFFFE00 /* IRQL 18 */ + .long 0xFFFFFE00 /* IRQL 19 */ + .long 0xFFFFFE80 /* IRQL 20 */ + .long 0xFFFFFEC0 /* IRQL 21 */ + .long 0xFFFFFEE0 /* IRQL 22 */ + .long 0xFFFFFEF0 /* IRQL 23 */ + .long 0xFFFFFEF8 /* IRQL 24 */ + .long 0xFFFFFEF8 /* IRQL 25 */ + .long 0xFFFFFEFA /* IRQL 26 */ + .long 0xFFFFFFFA /* IRQL 27 */ + .long 0xFFFFFFFB /* IRQL 28 */ + .long 0xFFFFFFFB /* IRQL 29 */ + .long 0xFFFFFFFB /* IRQL 30 */ + .long 0xFFFFFFFB /* IRQL 31 */ + +#if 0 +HalpSysIntHandler: +.rept 8 + .long GenericIRQ /* IRQ 0-7 */ +.endr + .long IRQ7 /* IRQ 7 */ +.rept 8 + .long GenericIRQ /* IRQ 8-15 */ +.endr + .long IRQ15 /* IRQ 15 */ +.rept 20 + .long GenericIRQ /* IRQ 16-35 */ +.endr +#endif + +SoftIntByteTable: + .byte PASSIVE_LEVEL /* IRR 0 */ + .byte PASSIVE_LEVEL /* IRR 1 */ + .byte APC_LEVEL /* IRR 2 */ + .byte APC_LEVEL /* IRR 3 */ + .byte DISPATCH_LEVEL /* IRR 4 */ + .byte DISPATCH_LEVEL /* IRR 5 */ + .byte DISPATCH_LEVEL /* IRR 6 */ + .byte DISPATCH_LEVEL /* IRR 7 */ + +SoftIntHandlerTable: + .long _KiUnexpectedInterrupt /* PASSIVE_LEVEL */ + .long _HalpApcInterrupt /* APC_LEVEL */ + .long _HalpDispatchInterrupt /* DISPATCH_LEVEL */ + +SoftIntHandlerTable2: + .long _KiUnexpectedInterrupt /* PASSIVE_LEVEL */ + .long _HalpApcInterrupt2ndEntry /* APC_LEVEL */ + .long _HalpDispatchInterrupt2ndEntry /* DISPATCH_LEVEL */ + +/* FUNCTIONS *****************************************************************/ + +.globl _HalpInitPICs@0 +.func HalpInitPICs@0 +_HalpInitPICs@0: + + /* Save ESI and disable interrupts */ + push esi + pushf + cli + + /* Read the init table */ + lea esi, PICInitTable + lodsw + +InitLoop: + + /* Put the port in EDX */ + movzx edx, ax + + /* Initialize the PIC, using a delay for each command */ + outsb + jmp $+2 + inc edx + outsb + jmp $+2 + outsb + jmp $+2 + outsb + jmp $+2 + + /* Mask all interrupts */ + mov al, 0xFA // FIXME: Should be 0xFF + out dx, al + + /* Check if we're done, otherwise initialize next PIC */ + lodsw + cmp ax, 0 + jnz InitLoop + + /* Restore interrupts and return */ + or dword ptr [esp], EFLAGS_INTERRUPT_MASK + popf + pop esi + ret +.endfunc + +.globl @HalRequestSoftwareInterrupt@4 +.func @HalRequestSoftwareInterrupt@4 +_@HalRequestSoftwareInterrupt@4: +@HalRequestSoftwareInterrupt@4: + + /* Get IRR mask */ + mov eax, 1 + shl eax, cl + + /* Disable interrupts */ + pushf + cli + + /* Set IRR and get IRQL */ + or [fs:KPCR_IRR], eax + mov cl, [fs:KPCR_IRQL] + + /* Get software IRR mask */ + mov eax, [fs:KPCR_IRR] + and eax, 3 + + /* Get highest pending software interrupt and check if it's higher */ + xor edx, edx + mov dl, SoftIntByteTable[eax] + cmp dl, cl + jbe AfterCall + + /* Call the pending interrupt */ + jmp $ + call SoftIntHandlerTable[edx*4] + +AfterCall: + + /* Retore interrupts and return */ + popf + ret +.endfunc + +.globl _HalDisableSystemInterrupt@8 +.func HalDisableSystemInterrupt@8 +_HalDisableSystemInterrupt@8: + + /* Convert to vector */ + movzx ecx, byte ptr [esp+4] + sub ecx, PRIMARY_VECTOR_BASE + + /* Disable interrupts and set the new IDR */ + mov edx, 1 + shl edx, cl + cli + or [fs+KPCR_IDR], edx + + /* Get the current mask */ + xor eax, eax + in al, 0xA1 + shl eax, 8 + in al, 0x21 + + /* Mask off the interrupt and write the new mask */ + or eax, edx + out 0x21, al + shr eax, 8 + out 0xA1, al + + /* Return with interrupts enabled */ + in al, 0xA1 + sti + ret 8 +.endfunc + +#if 0 +.globl _HalEnableSystemInterrupt@12 +.func HalEnableSystemInterrupt@12 +_HalEnableSystemInterrupt@12: + + /* Get the vector and validate it */ + jmp $ + movzx ecx, byte ptr [esp+4] + sub ecx, PRIMARY_VECTOR_BASE + jb Invalid + cmp ecx, CLOCK2_LEVEL + jnb Invalid + + /* Get the current PCI Edge/Level control registers */ + mov edx, 0x4D1 + in al, dx + shl ax, 8 + mov eax, 0x4D0 + in al, dx + mov dx, 1 + shl dx, cl + + /* Check if this is a latched interrupt */ + cmp dword ptr [esp+12], 0 + jnz Latched + + /* Use OR for edge interrupt */ + or ax, dx + jmp AfterMask +Latched: + + /* Mask it out for level interrupt */ + not dx + and ax, dx + +AfterMask: + + /* Set the PCI Edge/Level control registers */ + mov edx, 0x4D0 + out dx, al + shr ax, 8 + mov edx, 0x4D1 + out dx, al + + /* Calculate the new IDR */ + mov eax, 1 + shl eax, cl + not eax + cli + and [fs:KPCR_IDR], eax + + /* Get the current IRQL and mask the IRQs in the PIC */ + movzx eax, byte ptr [fs:KPCR_IRQL] + mov eax, _KiI8259MaskTable[eax*4] + or eax, [fs:KPCR_IDR] + out 0x21, al + shr eax, 8 + out 0xA1, al + + /* Enable interrupts and return TRUE */ + sti + mov eax, 1 + ret 12 + +Invalid: + + /* Fail, invalid IRQ */ + xor eax, eax + ret 12 +.endfunc + +.globl _HalBeginSystemInterrupt@12 +.func HalBeginSystemInterrupt@12 +_HalBeginSystemInterrupt@12: + + /* Convert to vector and call the handler */ + movzx ebx, byte ptr [esp+8] + sub ebx, PRIMARY_VECTOR_BASE + jmp HalpSysIntHandler[ebx*4] + +IRQ15: + + /* This is IRQ 15, check if it's spurious */ + mov al, 0xB + out 0xA0, al + in al, 0xA0 + test al, 0x80 + jnz GenericIRQ + + /* Cascaded interrupt... dismiss it and return FALSE */ + mov al, 0x62 + out 0x20, al + mov eax, 0 + ret 12 + +IRQ7: + + /* This is IRQ 7, check if it's spurious */ + mov al, 0xB + out 0x20, al + in al, 0x20 + test al, 0x80 + jnz GenericIRQ + + /* It is, return FALSE */ + mov eax, 0 + ret 12 + +GenericIRQ: + + /* Return the current IRQL */ + mov eax, [esp+12] + movzx ecx, word ptr [fs:KPCR_IRQL] + mov [eax], cl + + /* Set the new IRQL */ + movzx eax, byte ptr [esp+4] + mov [fs:KPCR_IRQL], al + + /* Set IRQ mask in the PIC */ + mov eax, _KiI8259MaskTable[eax*4] + or eax, [fs:KPCR_IDR] + out 0x21, al + shr eax, 8 + out 0xA1, al + + /* Check to which PIC the EOI was sent */ + mov eax, ebx + cmp eax, 8 + jnb Pic1 + + /* Write mask to master PIC */ + or al, 0x60 + out 0x20, al + jmp DoneBegin + +Pic1: + /* Write mask to slave PIC */ + mov al, 0x20 + out 0xA0, al + mov al, 0x62 + out 0x20, al + +DoneBegin: + + /* Enable interrupts and return TRUE */ + in al, 0x21 + sti + mov eax, 1 + ret 12 +.endfunc + +.globl _HalEndSystemInterrupt@8 +.func HalEndSystemInterrupt@8 +_HalEndSystemInterrupt@8: + + /* Get the IRQL and check if it's a software interrupt */ + movzx ecx, byte ptr [esp+4] + cmp byte ptr [fs:KPCR_IRQL], DISPATCH_LEVEL + jbe SkipMask2 + + /* Hardware interrupt, mask the appropriate IRQs in the PIC */ + mov eax, _KiI8259MaskTable[ecx*4] + or eax, [fs:KPCR_IDR] + out 0x21, al + shr eax, 8 + out 0xA1, al + +SkipMask2: + + /* Set IRQL and check if there are pending software interrupts */ + mov [fs:KPCR_IRQL], cl + mov eax, [fs:KPCR_IDR] + mov al, SoftIntByteTable[eax] + cmp al, cl + ja DoCall + ret 8 + +DoCall: + + /* There are pending softwate interrupts, call their handlers */ + add esp, 8 + jmp SoftIntHandlerTable2[eax*4] +.endfunc + +.globl @KfLowerIrql@4 +.func @KfLowerIrql@4 +_@KfLowerIrql@4: +@KfLowerIrql@4: + + /* Save flags since we'll disable interrupts */ + pushf + + /* Disable interrupts and check if IRQL is below DISPATCH_LEVEL */ + movzx ecx, cl + cmp byte ptr [fs:KPCR_IRQL], DISPATCH_LEVEL + cli + jbe SkipMask + + /* Clear interrupt masks since there's a pending hardware interrupt */ + mov eax, _KiI8259MaskTable[ecx*4] + or eax, [fs:KPCR_IDR] + out 0x21, al + shr eax, 8 + out 0xA1, al + +SkipMask: + + /* Set the new IRQL and check if there's a pending software interrupt */ + mov [fs:KPCR_IRQL], cl + mov eax, [fs:KPCR_IDR] + mov al, SoftIntByteTable[eax] + cmp al, cl + jbe AfterCall2 + + /* There is, call it */ + call SoftIntHandlerTable[eax*4] + +AfterCall2: + + /* Restore interrupts and return */ + popf + ret +.endfunc +#endif + +.globl @KfRaiseIrql@4 +.func @KfRaiseIrql@4 +_@KfRaiseIrql@4: +@KfRaiseIrql@4: + + /* Get the IRQL and check if it's Software level only */ + xor eax, eax + mov al, [fs:KPCR_IRQL] + + movzx ecx, cl + cmp cl, DISPATCH_LEVEL + jbe SetIrql + + /* Save the current IRQL */ + mov edx, eax + + /* It's a hardware IRQL, so disable interrupts */ + pushf + cli + + /* Set the new IRQL */ + mov [fs:KPCR_IRQL], cl + +#if 0 + /* Mask the interrupts in the PIC */ + mov eax, _KiI8259MaskTable[ecx*4] + or eax, [fs:KPCR_IDR] + out 0x21, al + shr eax, 8 + out 0xA1, al +#endif + + /* Restore interrupts and return old IRQL */ + popf + mov eax, edx + ret + +SetIrql: + + /* Set the IRQL and return */ + mov [fs:KPCR_IRQL], cl + ret +.endfunc + +.globl _KeGetCurrentIrql@0 +.func KeGetCurrentIrql@0 +_KeGetCurrentIrql@0: + + /* Return the IRQL */ + movzx eax, word ptr [fs:KPCR_IRQL] + ret +.endfunc + +.globl _KeRaiseIrqlToDpcLevel@0 +.func KeRaiseIrqlToDpcLevel@0 +_KeRaiseIrqlToDpcLevel@0: + + /* Get the current IRQL */ + xor eax, eax + mov al, [fs:KPCR_IRQL] + + /* Set DISPATCH_LEVEL */ + mov byte ptr [fs:KPCR_IRQL], DISPATCH_LEVEL + ret +.endfunc + +.globl _KeRaiseIrqlToSynchLevel@0 +.func KeRaiseIrqlToSynchLevel@0 +_KeRaiseIrqlToSynchLevel@0: + + /* Disable interrupts */ + pushf + cli + + /* Mask out interrupts */ + mov eax, _KiI8259MaskTable + DISPATCH_LEVEL * 2 + or eax, [fs:KPCR_IDR] + out 0x21, al + shr eax, 8 + out 0xA1, al + + /* Return the old IRQL, enable interrupts and set to DISPATCH */ + mov al, [fs:KPCR_IRQL] + mov byte ptr [fs:KPCR_IRQL], DISPATCH_LEVEL + popf + ret +.endfunc + +.globl _HalpApcInterrupt +.func HalpApcInterrupt +_HalpApcInterrupt: + + /* Create fake interrupt stack */ + pop eax + pushf + push cs + push eax + + /* Enter interrupt */ + INT_PROLOG(hapc) +.endfunc + +.globl _HalpApcInterrupt2ndEntry +.func HalpApcInterrupt2ndEntry +_HalpApcInterrupt2ndEntry: + + /* Save current IRQL and set to APC level */ + push [fs:KPCR_IRQL] + mov byte ptr [fs:KPCR_IRQL], APC_LEVEL + and dword ptr [fs:KPCR_IRR], ~(1 << APC_LEVEL) + + /* Enable interrupts and check if we came from User/V86 mode */ + sti + mov eax, [ebp+KTRAP_FRAME_CS] + and eax, MODE_MASK + test dword ptr [ebp+KTRAP_FRAME_EFLAGS], EFLAGS_V86_MASK + jz DeliverApc + + /* Set user mode delivery */ + or eax, UserMode + +DeliverApc: + + /* Deliver the APCs */ + push ebp + push 0 + push eax + call _KiDeliverApc@12 + + /* Disable interrupts and end it */ + cli + call _HalpEndSoftwareInterrupt@4 + jmp _Kei386EoiHelper@0 +.endfunc + +.globl _HalpDispatchInterrupt +.func HalpDispatchInterrupt +_HalpDispatchInterrupt: + + /* Create fake interrupt stack */ + pop eax + pushf + push cs + push eax + + /* Enter interrupt */ + INT_PROLOG(hapc) +.endfunc + +.globl _HalpDispatchInterrupt2ndEntry +.func HalpDispatchInterrupt2ndEntry +_HalpDispatchInterrupt2ndEntry: + + /* Save current IRQL and set to DPC level */ + push [fs:KPCR_IRQL] + mov byte ptr [fs:KPCR_IRQL], DISPATCH_LEVEL + and dword ptr [fs:KPCR_IRR], ~(1 << DISPATCH_LEVEL) + + /* Enable interrupts and let the kernel handle this */ + sti + call _KiDispatchInterrupt@0 + + /* Disable interrupts and end it */ + cli + call _HalpEndSoftwareInterrupt@4 + jmp _Kei386EoiHelper@0 +.endfunc + +.globl _HalpEndSoftwareInterrupt@4 +.func HalpEndSoftwareInterrupt@4 +_HalpEndSoftwareInterrupt@4: + + /* Get the IRQL and check if we're in the software region */ + movzx ecx, byte ptr [esp+4] + cmp byte ptr [fs:KPCR_IRQL], DISPATCH_LEVEL + jbe SoftwareInt + + /* Set the right mask in the PIC for the hardware IRQ */ + mov eax, _KiI8259MaskTable[ecx*4] + or eax, [fs:KPCR_IDR] + out 0x21, al + shr eax, 8 + out 0xA1, al + +SoftwareInt: + /* Check if there are pending software interrupts */ + mov [fs:KPCR_IRQL], cl + mov eax, [fs:KPCR_IDR] + mov al, SoftIntByteTable[eax] + cmp al, cl + ja DoCall2 + ret 4 + +DoCall2: + + /* There are pending softwate interrupts, call their handlers */ + add esp, 8 + jmp SoftIntHandlerTable2[eax*4] +.endfunc Modified: trunk/reactos/hal/halx86/generic/irql.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/irql.c?…
============================================================================== --- trunk/reactos/hal/halx86/generic/irql.c (original) +++ trunk/reactos/hal/halx86/generic/irql.c Wed Aug 23 00:50:52 2006 @@ -19,38 +19,16 @@ * FIXME: Use EISA_CONTROL STRUCTURE INSTEAD OF HARD-CODED OFFSETS */ -typedef union -{ - USHORT both; - struct - { - BYTE master; - BYTE slave; - }; -} -PIC_MASK; - -/* - * PURPOSE: - Mask for HalEnableSystemInterrupt and HalDisableSystemInterrupt - * - At startup enable timer and cascade - */ -#if defined(__GNUC__) -static PIC_MASK pic_mask = {.both = 0xFFFA}; -#else -static PIC_MASK pic_mask = { 0xFFFA }; -#endif - - -/* - * PURPOSE: Mask for disabling of acknowledged interrupts - */ -#if defined(__GNUC__) -static PIC_MASK pic_mask_intr = {.both = 0x0000}; -#else -static PIC_MASK pic_mask_intr = { 0 }; -#endif - -static ULONG HalpPendingInterruptCount[NR_IRQS]; +UCHAR Table[8] = +{ + 0, 0, + 1, 1, + 2, 2, 2, 2 +}; + +ULONG pic_mask = {0xFFFFFFFA}; + +static ULONG HalpPendingInterruptCount[NR_IRQS] = {0}; #define DIRQL_TO_IRQ(x) (PROFILE_LEVEL - x) #define IRQ_TO_DIRQL(x) (PROFILE_LEVEL - x) @@ -60,40 +38,7 @@ /* FUNCTIONS ****************************************************************/ -#undef KeGetCurrentIrql -KIRQL STDCALL KeGetCurrentIrql (VOID) -/* - * PURPOSE: Returns the current irq level - * RETURNS: The current irq level - */ -{ - return(KeGetPcr()->Irql); -} - -VOID HalpInitPICs(VOID) -{ - memset(HalpPendingInterruptCount, 0, sizeof(HalpPendingInterruptCount)); - - /* Initialization sequence */ - WRITE_PORT_UCHAR((PUCHAR)0x20, 0x11); - WRITE_PORT_UCHAR((PUCHAR)0xa0, 0x11); - /* Start of hardware irqs (0x24) */ - WRITE_PORT_UCHAR((PUCHAR)0x21, IRQ_BASE); - WRITE_PORT_UCHAR((PUCHAR)0xa1, IRQ_BASE + 8); - /* 8259-1 is master */ - WRITE_PORT_UCHAR((PUCHAR)0x21, 0x4); - /* 8259-2 is slave */ - WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x2); - /* 8086 mode */ - WRITE_PORT_UCHAR((PUCHAR)0x21, 0x1); - WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x1); - /* Enable interrupts */ - WRITE_PORT_UCHAR((PUCHAR)0x21, pic_mask.master); - WRITE_PORT_UCHAR((PUCHAR)0xa1, pic_mask.slave); - - /* We can now enable interrupts */ - Ki386EnableInterrupts(); -} +extern ULONG KiI8259MaskTable[]; VOID HalpEndSystemInterrupt(KIRQL Irql) /* @@ -101,21 +46,16 @@ */ { ULONG flags; - const USHORT mask[] = - { - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x8000, 0xc000, 0xe000, 0xf000, - 0xf800, 0xfc00, 0xfe00, 0xff00, 0xff80, 0xffc0, 0xffe0, 0xfff0, - 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, - }; + ULONG Mask; /* Interrupts should be disable while enabling irqs of both pics */ Ki386SaveFlags(flags); Ki386DisableInterrupts(); - pic_mask_intr.both &= mask[Irql]; - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)(pic_mask.master|pic_mask_intr.master)); - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)(pic_mask.slave|pic_mask_intr.slave)); + Mask = pic_mask | KiI8259MaskTable[Irql]; + WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)Mask); + Mask >>= 8; + WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); /* restore flags */ Ki386RestoreFlags(flags); @@ -168,9 +108,9 @@ return; } KeGetPcr()->Irql = DISPATCH_LEVEL; - if (((PKIPCR)KeGetPcr())->HalReserved[HAL_DPC_REQUEST]) - { - ((PKIPCR)KeGetPcr())->HalReserved[HAL_DPC_REQUEST] = FALSE; + if (Table[KeGetPcr()->IRR] >= NewIrql) + { + KeGetPcr()->IRR &= ~4; KiDispatchInterrupt(); } KeGetPcr()->Irql = APC_LEVEL; @@ -219,172 +159,36 @@ } -/********************************************************************** - * NAME EXPORTED - * KeLowerIrql - * - * DESCRIPTION - * Restores the irq level on the current processor - * - * ARGUMENTS - * NewIrql = Irql to lower to - * - * RETURN VALUE - * None - * - * NOTES - */ -#undef KeLowerIrql -VOID STDCALL -KeLowerIrql (KIRQL NewIrql) -{ - KfLowerIrql (NewIrql); -} - - -/********************************************************************** - * NAME EXPORTED - * KfRaiseIrql - * - * DESCRIPTION - * Raises the hardware priority (irql) - * - * ARGUMENTS - * NewIrql = Irql to raise to - * - * RETURN VALUE - * previous irq level - * - * NOTES - * Uses fastcall convention - */ - -KIRQL FASTCALL -KfRaiseIrql (KIRQL NewIrql) -{ - KIRQL OldIrql; - - DPRINT("KfRaiseIrql(NewIrql %d)\n", NewIrql); - - if (NewIrql < KeGetPcr()->Irql) - { - DbgPrint ("%s:%d CurrentIrql %x NewIrql %x\n", - __FILE__,__LINE__,KeGetPcr()->Irql,NewIrql); - KEBUGCHECK (0); - for(;;); - } - - OldIrql = KeGetPcr()->Irql; - KeGetPcr()->Irql = NewIrql; - return OldIrql; -} - - -/********************************************************************** - * NAME EXPORTED - * KeRaiseIrql - * - * DESCRIPTION - * Raises the hardware priority (irql) - * - * ARGUMENTS - * NewIrql = Irql to raise to - * OldIrql (OUT) = Caller supplied storage for the previous irql - * - * RETURN VALUE - * None - * - * NOTES - * Calls KfRaiseIrql - */ -#undef KeRaiseIrql -VOID STDCALL -KeRaiseIrql (KIRQL NewIrql, - PKIRQL OldIrql) -{ - *OldIrql = KfRaiseIrql (NewIrql); -} - - -/********************************************************************** - * NAME EXPORTED - * KeRaiseIrqlToDpcLevel - * - * DESCRIPTION - * Raises the hardware priority (irql) to DISPATCH level - * - * ARGUMENTS - * None - * - * RETURN VALUE - * Previous irq level - * - * NOTES - * Calls KfRaiseIrql - */ - -KIRQL STDCALL -KeRaiseIrqlToDpcLevel (VOID) -{ - return KfRaiseIrql (DISPATCH_LEVEL); -} - - -/********************************************************************** - * NAME EXPORTED - * KeRaiseIrqlToSynchLevel - * - * DESCRIPTION - * Raises the hardware priority (irql) to CLOCK2 level - * - * ARGUMENTS - * None - * - * RETURN VALUE - * Previous irq level - * - * NOTES - * Calls KfRaiseIrql - */ - -KIRQL STDCALL -KeRaiseIrqlToSynchLevel (VOID) -{ - return KfRaiseIrql (CLOCK2_LEVEL); -} - - BOOLEAN STDCALL HalBeginSystemInterrupt (KIRQL Irql, ULONG Vector, PKIRQL OldIrql) { ULONG irq; + ULONG Mask; + if (Vector < IRQ_BASE || Vector >= IRQ_BASE + NR_IRQS) { return(FALSE); } irq = Vector - IRQ_BASE; - pic_mask_intr.both |= ((1 << irq) & 0xfffe); // do not disable the timer interrupt + + Mask = pic_mask | KiI8259MaskTable[Irql]; + WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)Mask); + Mask >>= 8; + WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); if (irq < 8) { - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)(pic_mask.master|pic_mask_intr.master)); - WRITE_PORT_UCHAR((PUCHAR)0x20, 0x20); + WRITE_PORT_UCHAR((PUCHAR)0x20, 0x60 | irq); } else { - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)(pic_mask.slave|pic_mask_intr.slave)); /* Send EOI to the PICs */ - WRITE_PORT_UCHAR((PUCHAR)0x20,0x20); + WRITE_PORT_UCHAR((PUCHAR)0x20,0x62); WRITE_PORT_UCHAR((PUCHAR)0xa0,0x20); } - - if (KeGetPcr()->Irql >= Irql) - { - HalpPendingInterruptCount[irq]++; - return(FALSE); - } + *OldIrql = KeGetPcr()->Irql; KeGetPcr()->Irql = Irql; @@ -397,35 +201,10 @@ * FUNCTION: Finish a system interrupt and restore the specified irq level. */ { + //DPRINT1("ENDING: %lx %lx\n", Irql, Unknown2); HalpLowerIrql(Irql); HalpEndSystemInterrupt(Irql); } - -BOOLEAN -STDCALL -HalDisableSystemInterrupt( - ULONG Vector, - KIRQL Irql) -{ - ULONG irq; - - if (Vector < IRQ_BASE || Vector >= IRQ_BASE + NR_IRQS) - return FALSE; - - irq = Vector - IRQ_BASE; - pic_mask.both |= (1 << irq); - if (irq < 8) - { - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)(pic_mask.master|pic_mask_intr.slave)); - } - else - { - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)(pic_mask.slave|pic_mask_intr.slave)); - } - - return TRUE; -} - BOOLEAN STDCALL @@ -435,42 +214,22 @@ KINTERRUPT_MODE InterruptMode) { ULONG irq; + ULONG Mask; if (Vector < IRQ_BASE || Vector >= IRQ_BASE + NR_IRQS) return FALSE; irq = Vector - IRQ_BASE; - pic_mask.both &= ~(1 << irq); - if (irq < 8) - { - WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)(pic_mask.master|pic_mask_intr.master)); - } - else - { - WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)(pic_mask.slave|pic_mask_intr.slave)); - } + pic_mask &= ~(1 << irq); + + Mask = pic_mask | KiI8259MaskTable[KeGetPcr()->Irql]; + WRITE_PORT_UCHAR((PUCHAR)0x21, (UCHAR)Mask); + Mask >>= 8; + WRITE_PORT_UCHAR((PUCHAR)0xa1, (UCHAR)Mask); return TRUE; } -VOID FASTCALL -HalRequestSoftwareInterrupt( - IN KIRQL Request) -{ - switch (Request) - { - case APC_LEVEL: - ((PKIPCR)KeGetPcr())->HalReserved[HAL_APC_REQUEST] = TRUE; - break; - - case DISPATCH_LEVEL: - ((PKIPCR)KeGetPcr())->HalReserved[HAL_DPC_REQUEST] = TRUE; - break; - - default: - KEBUGCHECK(0); - } -} /* EOF */ Modified: trunk/reactos/hal/halx86/generic/spinlock.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/spinloc…
============================================================================== --- trunk/reactos/hal/halx86/generic/spinlock.c (original) +++ trunk/reactos/hal/halx86/generic/spinlock.c Wed Aug 23 00:50:52 2006 @@ -14,8 +14,33 @@ #undef KeAcquireSpinLock #undef KeReleaseSpinLock +#undef KeLowerIrql +#undef KeRaiseIrql /* FUNCTIONS ***************************************************************/ + +/* + * @implemented + */ +VOID +NTAPI +KeLowerIrql(KIRQL NewIrql) +{ + /* Call the fastcall function */ + KfLowerIrql(NewIrql); +} + +/* + * @implemented + */ +VOID +NTAPI +KeRaiseIrql(KIRQL NewIrql, + PKIRQL OldIrql) +{ + /* Call the fastcall function */ + *OldIrql = KfRaiseIrql(NewIrql); +} /* * @implemented Modified: trunk/reactos/hal/halx86/include/halp.h URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/include/halp.h?…
============================================================================== --- trunk/reactos/hal/halx86/include/halp.h (original) +++ trunk/reactos/hal/halx86/include/halp.h Wed Aug 23 00:50:52 2006 @@ -29,7 +29,7 @@ VOID HalpInitBusHandlers (VOID); /* irql.c */ -VOID HalpInitPICs(VOID); +VOID NTAPI HalpInitPICs(VOID); /* udelay.c */ VOID HalpCalibrateStallExecution(VOID); Modified: trunk/reactos/include/ndk/asm.h URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/include/ndk/asm.h?rev=2364…
============================================================================== --- trunk/reactos/include/ndk/asm.h (original) +++ trunk/reactos/include/ndk/asm.h Wed Aug 23 00:50:52 2006 @@ -433,8 +433,9 @@ // // Vector base -// -#define PRIMARY_VECTOR_BASE 0x30 +// ROS HACK HACK HACK +// +#define PRIMARY_VECTOR_BASE 0x40 // // Kernel Feature Bits Modified: trunk/reactos/ntoskrnl/ex/init.c URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ex/init.c?rev=236…
============================================================================== --- trunk/reactos/ntoskrnl/ex/init.c (original) +++ trunk/reactos/ntoskrnl/ex/init.c Wed Aug 23 00:50:52 2006 @@ -260,6 +260,10 @@ ASSERT(FIELD_OFFSET(KV86M_TRAP_FRAME, orig_ebp) == TF_ORIG_EBP); ASSERT(FIELD_OFFSET(KPCR, Tib.ExceptionList) == KPCR_EXCEPTION_LIST); ASSERT(FIELD_OFFSET(KPCR, Self) == KPCR_SELF); + ASSERT(FIELD_OFFSET(KPCR, IRR) == KPCR_IRR); + ASSERT(KeGetPcr()->IRR == 0); + ASSERT(FIELD_OFFSET(KPCR, IDR) == KPCR_IDR); + ASSERT(FIELD_OFFSET(KPCR, Irql) == KPCR_IRQL); ASSERT(FIELD_OFFSET(KIPCR, PrcbData) + FIELD_OFFSET(KPRCB, CurrentThread) == KPCR_CURRENT_THREAD); ASSERT(FIELD_OFFSET(KIPCR, PrcbData) + FIELD_OFFSET(KPRCB, NpxThread) == KPCR_NPX_THREAD); ASSERT(FIELD_OFFSET(KTSS, Esp0) == KTSS_ESP0);
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