Ros-diffs January 2007

ros-diffs@reactos.org
  • 21 participants
  • 401 discussions

[greatlrd] 25514: Implement disambler for stwu, left todo add it to the Converter
by greatlrd@svn.reactos.org
17 years, 11 months

[cwittich] 25513: fix some warnings
by cwittich@svn.reactos.org
17 years, 11 months

[weiden] 25512: Use comctl32's syslink control, no need to reinvent the wheel
by weiden@svn.reactos.org
17 years, 11 months

[greatlrd] 25511: Fixing some ppc disambler bugs. Li are not 100% test it can contain some fault. Fixing Li bug the register for dest was wrong calctions see file OpCodePPC.txt. fixing some meaing in ReadMe.txt
by greatlrd@svn.reactos.org
17 years, 11 months

[fireball] 25510: Merge 25117. Revision: 25117 Author: greatlrd Date: 20:39:01, 10 december 2006. Message: Commit the patch from bug 1874 even if it does not use the RDMSR and WRMSR measure method, we need to use the RDMSR and WRMSR instructions for dual core and only if CPU supports them (see Intel documentations AP-485 to see how to do it). The patch is from HTO (Dmitry Gorbachev). Bugfix detections of RTSC support for single and dual core by me, adding check if the CPU supports RDMSR and WRMS
by fireball@svn.reactos.org
17 years, 11 months

[fireball] 25509: Merge r25264. Author: hpoussin Date: 17:50:16, 1 january 2007. Message: Better support for non X86 systems
by fireball@svn.reactos.org
17 years, 11 months

[jimtabor] 25508: Add Arc.c to win32k. See gdi32 painting.c for more info.
by jimtabor@svn.reactos.org
17 years, 11 months

[greatlrd] 25507: Expain how the bit order works and how get the opcode. The IBM and freescale manual for ppc cpu are not good expain it. now I got less headic, and got understainf how to decoding the manual and how the opcode are store.
by greatlrd@svn.reactos.org
17 years, 11 months

[greatlrd] 25506: Adding a opcode list, which opcode we are supportin convert from
by greatlrd@svn.reactos.org
17 years, 11 months

[spetreolle] 25505: fix gcc4 build
by spetreolle@svn.reactos.org
17 years, 11 months
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