Ros-diffs March 2008

ros-diffs@reactos.org
  • 22 participants
  • 269 discussions

[gbrunmar] 32668: * Made IDirect3D9 structure more MS compatible. * Removed duplicate initing of internal structure * Started implementing IDirect3D9::CreateDevice() error return values
by gbrunmar@svn.reactos.org
16 years, 7 months

[fireball] 32667: - Fix build.
by fireball@svn.reactos.org
16 years, 7 months

[ros-arm-bringup] 32666: - We now define a much simpler system call interface -- instead of using interrupt 2E with the system call ID in the ip register, we use the system call ID as the interrupt number! On ARM, all software interrupts have a generic handler, so ANY software interrupt will be a system call, and the interrupt number is the system call ID! - Removed a bunch more i386-only exports from the ARM kernel. - Implemented all the READ/WRITE_REGISTER* routines for ARM/PPC. - Implement ha
by ros-arm-bringup@svn.reactos.org
16 years, 7 months

[cfinck] 32665: [FORMATTING] Fix indentation
by cfinck@svn.reactos.org
16 years, 7 months

[ros-arm-bringup] 32664: - Make another kind of page fault also be handleable by our hacked-up handler: paged pool now fully works. - Current status: we now make it all the way to the first system call at the end of Phase 0! - We now make the IRQL routines modify the IRQL saved in the KPCR, to make some assertions work. - Build mem.c and memgen.c from RTL in order to get non-optimized but portable Rtl*Memory routines and Rtl*Swap routines. - Take the PPC non-optimized but portable Ex*Interlocked
by ros-arm-bringup@svn.reactos.org
16 years, 7 months

[dreimer] 32663: Update German language File
by dreimer@svn.reactos.org
16 years, 7 months

[fireball] 32662: - Update FSRTL_ADVANCED_FCB_HEADER to support newer version headers. - Split Reserved into two bitfields: Reserved and Version.
by fireball@svn.reactos.org
16 years, 7 months

[dchapyshev] 32661: - Fix typo (part 2/2)
by dchapyshev@svn.reactos.org
16 years, 7 months

[dchapyshev] 32660: - Fix typo (part 1/2)
by dchapyshev@svn.reactos.org
16 years, 7 months

[ros-arm-bringup] 32659: - Convert all Loader Block structures to virtual addresses (By adding KSEG0_BASE) since the kernel eventually unmaps the page table responsible for the physical->virtual identity mapping, but we'll still need to access the loader block. - Implement proper trap prolog/epilog code -- currently used and tested in the data abort handler. Currently hacked away some KTRAP_FRAME stuff on ARM. - The data abort handler has a very rudimentary check to detect page faults and will c
by ros-arm-bringup@svn.reactos.org
16 years, 7 months
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