Ros-diffs July 2009

ros-diffs@reactos.org

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[dchapyshev] 41930: - Implement QueryFullProcessImageNameA/W (based on Wine code). +35 passed tests
by dchapyshev＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: dchapyshev Date: Sun Jul 12 16:21:20 2009 New Revision: 41930 URL: http://svn.reactos.org/svn/reactos?rev=41930&view=rev Log: - Implement QueryFullProcessImageNameA/W (based on Wine code). +35 passed tests Modified: trunk/reactos/dll/win32/kernel32/kernel32.pspec trunk/reactos/dll/win32/kernel32/process/proc.c Modified: trunk/reactos/dll/win32/kernel32/kernel32.pspec URL: http://svn.reactos.org/svn/reactos/trunk/reactos/dll/win32/kernel32/kernel3… ============================================================================== --- trunk/reactos/dll/win32/kernel32/kernel32.pspec [iso-8859-1] (original) +++ trunk/reactos/dll/win32/kernel32/kernel32.pspec [iso-8859-1] Sun Jul 12 16:21:20 2009 @@ -1017,3 +1017,7 @@ @ stdcall lstrlen(str) lstrlenA @ stdcall lstrlenA(str) @ stdcall lstrlenW(wstr) + +; Functions added in Win Vista +@ stdcall QueryFullProcessImageNameA(ptr long str ptr) +@ stdcall QueryFullProcessImageNameW(ptr long wstr ptr) Modified: trunk/reactos/dll/win32/kernel32/process/proc.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/dll/win32/kernel32/process… ============================================================================== --- trunk/reactos/dll/win32/kernel32/process/proc.c [iso-8859-1] (original) +++ trunk/reactos/dll/win32/kernel32/process/proc.c [iso-8859-1] Sun Jul 12 16:21:20 2009 @@ -1006,4 +1006,106 @@ return TRUE; } + +/* + * @implemented + */ +BOOL +WINAPI +QueryFullProcessImageNameW(HANDLE hProcess, + DWORD dwFlags, + LPWSTR lpExeName, + PDWORD pdwSize) +{ + BYTE Buffer[sizeof(UNICODE_STRING) + MAX_PATH * sizeof(WCHAR)]; + UNICODE_STRING *DynamicBuffer = NULL; + UNICODE_STRING *Result = NULL; + NTSTATUS Status; + DWORD Needed; + + Status = NtQueryInformationProcess(hProcess, + ProcessImageFileName, + Buffer, + sizeof(Buffer) - sizeof(WCHAR), + &Needed); + if (Status == STATUS_INFO_LENGTH_MISMATCH) + { + DynamicBuffer = RtlAllocateHeap(RtlGetProcessHeap(), 0, Needed + sizeof(WCHAR)); + if (!DynamicBuffer) + { + SetLastErrorByStatus(STATUS_NO_MEMORY); + return FALSE; + } + + Status = NtQueryInformationProcess(hProcess, + ProcessImageFileName, + (LPBYTE)DynamicBuffer, + Needed, + &Needed); + Result = DynamicBuffer; + } + else Result = (PUNICODE_STRING)Buffer; + + if (!NT_SUCCESS(Status)) goto Cleanup; + + if (Result->Length / sizeof(WCHAR) + 1 > *pdwSize) + { + Status = STATUS_BUFFER_TOO_SMALL; + goto Cleanup; + } + + *pdwSize = Result->Length / sizeof(WCHAR); + memcpy(lpExeName, Result->Buffer, Result->Length); + lpExeName[*pdwSize] = 0; + +Cleanup: + RtlFreeHeap(RtlGetProcessHeap(), 0, DynamicBuffer); + + if (!NT_SUCCESS(Status)) + { + SetLastErrorByStatus(Status); + } + return !Status; +} + + +/* + * @implemented + */ +BOOL +WINAPI +QueryFullProcessImageNameA(HANDLE hProcess, + DWORD dwFlags, + LPSTR lpExeName, + PDWORD pdwSize) +{ + DWORD pdwSizeW = *pdwSize; + BOOL Result; + LPWSTR lpExeNameW; + + lpExeNameW = RtlAllocateHeap(RtlGetProcessHeap(), + HEAP_ZERO_MEMORY, + *pdwSize * sizeof(WCHAR)); + if (!lpExeNameW) + { + SetLastErrorByStatus(STATUS_NO_MEMORY); + return FALSE; + } + + Result = QueryFullProcessImageNameW(hProcess, dwFlags, lpExeNameW, &pdwSizeW); + + if (Result) + Result = (0 != WideCharToMultiByte(CP_ACP, 0, + lpExeNameW, + -1, + lpExeName, + *pdwSize, + NULL, NULL)); + if (Result) + *pdwSize = strlen(lpExeName); + + RtlFreeHeap(RtlGetProcessHeap(), 0, lpExeNameW); + return Result; +} + /* EOF */

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[ros-arm-bringup] 41929: Header fixes for ARM to deal with the header cleanup that was performed earlier this year... * ARMDDK is now rationed between user-mode and kernel-mode definitions and imported by WINNT and WINDDK both (Since these don't include each others anymore) Make the MDL flags crossarch instead of x86 only The ARM tree now builds completely, except for the new ARM3 code in ntos... good job guys. 10/10. wasn't this supposed to make things --portable--?
by ros-arm-bringup＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: ros-arm-bringup Date: Sun Jul 12 14:52:13 2009 New Revision: 41929 URL: http://svn.reactos.org/svn/reactos?rev=41929&view=rev Log: Header fixes for ARM to deal with the header cleanup that was performed earlier this year... * ARMDDK is now rationed between user-mode and kernel-mode definitions and imported by WINNT and WINDDK both (Since these don't include each others anymore) Make the MDL flags crossarch instead of x86 only The ARM tree now builds completely, except for the new ARM3 code in ntos... good job guys. 10/10. wasn't this supposed to make things --portable--? Modified: trunk/reactos/include/ddk/winddk.h trunk/reactos/include/psdk/winnt.h trunk/reactos/include/reactos/arm/armddk.h Modified: trunk/reactos/include/ddk/winddk.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/ddk/winddk.h?rev=4… ============================================================================== --- trunk/reactos/include/ddk/winddk.h [iso-8859-1] (original) +++ trunk/reactos/include/ddk/winddk.h [iso-8859-1] Sun Jul 12 14:52:13 2009 @@ -187,6 +187,7 @@ #if (_M_IX86) #define KIP0PCRADDRESS 0xffdff000 + #endif #define KERNEL_STACK_SIZE 12288 @@ -5183,9 +5184,6 @@ #define MM_KSEG0_BASE MM_SYSTEM_RANGE_START #define MM_SYSTEM_SPACE_END 0xFFFFFFFF -#define MM_DONT_ZERO_ALLOCATION 0x00000001 -#define MM_ALLOCATE_FROM_LOCAL_NODE_ONLY 0x00000002 - #elif defined(__x86_64__) #define CONTEXT_AMD64 0x100000 @@ -5566,6 +5564,10 @@ #error Unknown architecture #endif +#define MM_DONT_ZERO_ALLOCATION 0x00000001 +#define MM_ALLOCATE_FROM_LOCAL_NODE_ONLY 0x00000002 + + #define EFLAG_SIGN 0x8000 #define EFLAG_ZERO 0x4000 #define EFLAG_SELECT (EFLAG_SIGN | EFLAG_ZERO) @@ -5678,9 +5680,48 @@ #define KeGetDcacheFillSize() 1L -#else // !defined (_X86_) - -FORCEINLINE +#elif defined(_M_ARM) // !defined (_X86_) + + NTHALAPI + KIRQL + FASTCALL + KfAcquireSpinLock( + IN PKSPIN_LOCK SpinLock); + + NTHALAPI + VOID + FASTCALL + KfReleaseSpinLock( + IN PKSPIN_LOCK SpinLock, + IN KIRQL NewIrql); + + + NTKERNELAPI + VOID + FASTCALL + KefAcquireSpinLockAtDpcLevel( + IN PKSPIN_LOCK SpinLock); + + NTKERNELAPI + VOID + FASTCALL + KefReleaseSpinLockFromDpcLevel( + IN PKSPIN_LOCK SpinLock); + + +#define KeAcquireSpinLockAtDpcLevel(SpinLock) KefAcquireSpinLockAtDpcLevel(SpinLock) +#define KeReleaseSpinLockFromDpcLevel(SpinLock) KefReleaseSpinLockFromDpcLevel(SpinLock) +#define KeAcquireSpinLock(a,b) *(b) = KfAcquireSpinLock(a) +#define KeReleaseSpinLock(a,b) KfReleaseSpinLock(a,b) + + NTKERNELAPI + VOID + NTAPI + KeInitializeSpinLock( + IN PKSPIN_LOCK SpinLock); + +#else + VOID NTAPI KeInitializeSpinLock( @@ -10691,6 +10732,13 @@ #define ExInterlockedExchangeUlong(Target, Value, Lock) Exfi386InterlockedExchangeUlong(Target, Value) #endif /* _X86_ */ + +#ifdef _M_ARM +// +// NT-ARM is not documented +// +#include <armddk.h> +#endif #ifdef __cplusplus } Modified: trunk/reactos/include/psdk/winnt.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/psdk/winnt.h?rev=4… ============================================================================== --- trunk/reactos/include/psdk/winnt.h [iso-8859-1] (original) +++ trunk/reactos/include/psdk/winnt.h [iso-8859-1] Sun Jul 12 14:52:13 2009 @@ -4863,7 +4863,6 @@ // // NT-ARM is not documented // -#define KIRQL ULONG // Hack! #include <armddk.h> #elif defined (_M_AMD64) Modified: trunk/reactos/include/reactos/arm/armddk.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/reactos/arm/armddk… ============================================================================== --- trunk/reactos/include/reactos/arm/armddk.h [iso-8859-1] (original) +++ trunk/reactos/include/reactos/arm/armddk.h [iso-8859-1] Sun Jul 12 14:52:13 2009 @@ -1,6 +1,14 @@ #ifndef _ARMDDK_ #define _ARMDDK_ +// +// Page size +// +#ifndef PAGE_SIZE +#define PAGE_SIZE 0x1000 +#endif + +#ifndef _WINNT_H // // IRQLs // @@ -15,12 +23,6 @@ #define IPI_LEVEL 29 #define POWER_LEVEL 30 #define HIGH_LEVEL 31 - -// -// Page size -// -#ifndef PAGE_SIZE -#define PAGE_SIZE 0x1000 #endif // @@ -31,6 +33,21 @@ #define USPCR 0x7FFF0000 #define PCR ((volatile KPCR * const)KIPCR) #define USERPCR ((volatile KPCR * const)USPCR) +#define KeGetPcr() PCR +#ifndef _WINNT_H +#define SharedUserData ((KUSER_SHARED_DATA * const)KI_USER_SHARED_DATA) + +// +// Address space layout +// +extern PVOID MmHighestUserAddress; +extern PVOID MmSystemRangeStart; +extern ULONG_PTR MmUserProbeAddress; +#define MM_HIGHEST_USER_ADDRESS MmHighestUserAddress +#define MM_SYSTEM_RANGE_START MmSystemRangeStart +#define MM_USER_PROBE_ADDRESS MmUserProbeAddress +#define MM_LOWEST_USER_ADDRESS (PVOID)0x10000 +#define MM_LOWEST_SYSTEM_ADDRESS (PVOID)0xC1400000 // // Maximum IRQs @@ -65,7 +82,6 @@ ULONG Reserved; } KFLOATING_SAVE, *PKFLOATING_SAVE; -#ifndef _WINNT_H /* The following flags control the contents of the CONTEXT structure. */ #define CONTEXT_ARM 0x0000040 #define CONTEXT_CONTROL (CONTEXT_ARM | 0x00000001L) @@ -127,7 +143,7 @@ { ULONG MinorVersion; ULONG MajorVersion; - PKINTERRUPT_ROUTINE InterruptRoutine[MAXIMUM_VECTOR]; + PKINTERRUPT_ROUTINE InterruptRoutine[32]; PVOID XcodeDispatch; ULONG FirstLevelDcacheSize; ULONG FirstLevelDcacheFillSize; @@ -153,8 +169,8 @@ PVOID InstructionBusError; ULONG CachePolicy; ULONG AlignedCachePolicy; - UCHAR IrqlMask[HIGH_LEVEL + 1]; - ULONG IrqlTable[HIGH_LEVEL + 1]; + UCHAR IrqlMask[32]; + ULONG IrqlTable[32]; UCHAR CurrentIrql; KAFFINITY SetMember; struct _KTHREAD *CurrentThread; @@ -190,6 +206,7 @@ return (struct _TEB*)USERPCR->Teb; } +#ifndef _WINNT_H // // IRQL Support on ARM is similar to MIPS/ALPHA // @@ -228,5 +245,12 @@ HalSweepIcache( VOID ); - -#endif +#endif + +// +// Intrinsics +// +#define InterlockedDecrement _InterlockedDecrement +#define InterlockedIncrement _InterlockedIncrement +#define InterlockedExchange _InterlockedExchange +#endif

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[ros-arm-bringup] 41928: Add some more intrinsics, and change _enable and _disable to use the new ARMv6 instructions instead... we'll have to make similar changes to the routines that use SWP
by ros-arm-bringup＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: ros-arm-bringup Date: Sun Jul 12 14:49:47 2009 New Revision: 41928 URL: http://svn.reactos.org/svn/reactos?rev=41928&view=rev Log: Add some more intrinsics, and change _enable and _disable to use the new ARMv6 instructions instead... we'll have to make similar changes to the routines that use SWP Modified: trunk/reactos/include/crt/mingw32/intrin_arm.h Modified: trunk/reactos/include/crt/mingw32/intrin_arm.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/crt/mingw32/intrin… ============================================================================== --- trunk/reactos/include/crt/mingw32/intrin_arm.h [iso-8859-1] (original) +++ trunk/reactos/include/crt/mingw32/intrin_arm.h [iso-8859-1] Sun Jul 12 14:49:47 2009 @@ -121,6 +121,14 @@ return (void *)_InterlockedExchange((volatile long * const)Target, (const long)Value); } + + +__INTRIN_INLINE unsigned char _BitScanReverse(unsigned long * const Index, const unsigned long Mask) +{ + *Index = 31 - __builtin_clz(Mask); + return Mask ? 1 : 0; +} + __INTRIN_INLINE char _InterlockedAnd8(volatile char * const value, const char mask) { char x; @@ -294,13 +302,17 @@ return _InterlockedExchangeAdd16(lpAddend, 1) + 1; } +__INTRIN_INLINE long _InterlockedAddLargeStatistic(volatile long long * const Addend, const long Value) +{ + *Addend += Value; + return Value; +} + __INTRIN_INLINE void _disable(void) { __asm__ __volatile__ ( - "mrs r1, cpsr;" - "orr r1, r1, #0x80;" - "msr cpsr, r1;" + "cpsid i @ __cli" : : : "memory", "cc" ); } @@ -308,10 +320,18 @@ { __asm__ __volatile__ ( - "mrs r1, cpsr;" - "bic r1, r1, #0x80;" - "msr cpsr, r1;" + "cpsie i @ __sti" : : : "memory", "cc" ); +} + +__INTRIN_INLINE unsigned char _interlockedbittestandset(volatile long * a, const long b) +{ + return (_InterlockedOr(a, 1 << b) >> b) & 1; +} + +__INTRIN_INLINE unsigned char _interlockedbittestandreset(volatile long * a, const long b) +{ + return (_InterlockedAnd(a, ~(1 << b)) >> b) & 1; } #ifndef __MSVCRT__

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[ros-arm-bringup] 41927: Define all the other PROCESSOR_ARCHITECTURE values too
by ros-arm-bringup＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: ros-arm-bringup Date: Sun Jul 12 14:48:23 2009 New Revision: 41927 URL: http://svn.reactos.org/svn/reactos?rev=41927&view=rev Log: Define all the other PROCESSOR_ARCHITECTURE values too Modified: trunk/reactos/include/ndk/ketypes.h Modified: trunk/reactos/include/ndk/ketypes.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/ndk/ketypes.h?rev=… ============================================================================== --- trunk/reactos/include/ndk/ketypes.h [iso-8859-1] (original) +++ trunk/reactos/include/ndk/ketypes.h [iso-8859-1] Sun Jul 12 14:48:23 2009 @@ -43,6 +43,16 @@ // Processor Architectures // #define PROCESSOR_ARCHITECTURE_INTEL 0 +#define PROCESSOR_ARCHITECTURE_MIPS 1 +#define PROCESSOR_ARCHITECTURE_ALPHA 2 +#define PROCESSOR_ARCHITECTURE_PPC 3 +#define PROCESSOR_ARCHITECTURE_SHX 4 +#define PROCESSOR_ARCHITECTURE_ARM 5 +#define PROCESSOR_ARCHITECTURE_IA64 6 +#define PROCESSOR_ARCHITECTURE_ALPHA64 7 +#define PROCESSOR_ARCHITECTURE_MSIL 8 +#define PROCESSOR_ARCHITECTURE_AMD64 9 +#define PROCESSOR_ARCHITECTURE_UNKNOWN 0xFFFF // // Object Type Mask for Kernel Dispatcher Objects

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[ros-arm-bringup] 41926: Deal with the fact that DirectoryTableBase in EPROCESS has now been defined as PULONG instead of LARGE_INTEGER Remove ARM-specific hyperspace functions since these are portable now
by ros-arm-bringup＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: ros-arm-bringup Date: Sun Jul 12 14:47:45 2009 New Revision: 41926 URL: http://svn.reactos.org/svn/reactos?rev=41926&view=rev Log: Deal with the fact that DirectoryTableBase in EPROCESS has now been defined as PULONG instead of LARGE_INTEGER Remove ARM-specific hyperspace functions since these are portable now Modified: trunk/reactos/ntoskrnl/ke/arm/kiinit.c trunk/reactos/ntoskrnl/ke/arm/trapc.c trunk/reactos/ntoskrnl/mm/arm/stubs.c Modified: trunk/reactos/ntoskrnl/ke/arm/kiinit.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/kiinit.c?r… ============================================================================== --- trunk/reactos/ntoskrnl/ke/arm/kiinit.c [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/ke/arm/kiinit.c [iso-8859-1] Sun Jul 12 14:47:45 2009 @@ -42,7 +42,7 @@ IN CCHAR Number, IN PLOADER_PARAMETER_BLOCK LoaderBlock) { - LARGE_INTEGER PageDirectory; + ULONG PageDirectory[2]; PKPCR Pcr; ULONG i; @@ -200,11 +200,10 @@ // Initialize the Idle Process and the Process Listhead // InitializeListHead(&KiProcessListHead); - PageDirectory.QuadPart = 0; KeInitializeProcess(InitProcess, 0, 0xFFFFFFFF, - &PageDirectory, + PageDirectory, FALSE); InitProcess->QuantumReset = MAXCHAR; } Modified: trunk/reactos/ntoskrnl/ke/arm/trapc.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/trapc.c?re… ============================================================================== --- trunk/reactos/ntoskrnl/ke/arm/trapc.c [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/ke/arm/trapc.c [iso-8859-1] Sun Jul 12 14:47:45 2009 @@ -100,7 +100,7 @@ // // Update the page directory base // - TtbRegister.AsUlong = (ULONG)NewProcess->DirectoryTableBase.LowPart; + TtbRegister.AsUlong = NewProcess->DirectoryTableBase[0]; ASSERT(TtbRegister.Reserved == 0); KeArmTranslationTableRegisterSet(TtbRegister); @@ -148,8 +148,8 @@ // // Check if address space switch is needed // - if (OldProcess->DirectoryTableBase.LowPart != - NewProcess->DirectoryTableBase.LowPart) + if (OldProcess->DirectoryTableBase[0] != + NewProcess->DirectoryTableBase[0]) { // // FIXME-USER: Support address space switch Modified: trunk/reactos/ntoskrnl/mm/arm/stubs.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/mm/arm/stubs.c?re… ============================================================================== --- trunk/reactos/ntoskrnl/mm/arm/stubs.c [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/mm/arm/stubs.c [iso-8859-1] Sun Jul 12 14:47:45 2009 @@ -290,7 +290,7 @@ NTAPI MmCreateProcessAddressSpace(IN ULONG MinWs, IN PEPROCESS Process, - IN PLARGE_INTEGER DirectoryTableBase) + IN PULONG DirectoryTableBase) { NTSTATUS Status; ULONG i; @@ -360,7 +360,7 @@ // // Return the page table base // - DirectoryTableBase->QuadPart = Pfn[0] << PAGE_SHIFT; + DirectoryTableBase[0] = Pfn[0] << PAGE_SHIFT; return TRUE; } @@ -391,12 +391,13 @@ NTSTATUS NTAPI MmInitializeHandBuiltProcess(IN PEPROCESS Process, - IN PLARGE_INTEGER DirectoryTableBase) + IN PULONG DirectoryTableBase) { // // Share the directory base with the idle process // - *DirectoryTableBase = PsGetCurrentProcess()->Pcb.DirectoryTableBase; + DirectoryTableBase[0] = PsGetCurrentProcess()->Pcb.DirectoryTableBase[0]; + DirectoryTableBase[1] = PsGetCurrentProcess()->Pcb.DirectoryTableBase[1]; // // Initialize the Addresss Space @@ -685,93 +686,6 @@ // if (WasDirty) *WasDirty = FALSE; // LIE!!! if (Page) *Page = Pfn; -} - -PVOID -NTAPI -MmCreateHyperspaceMapping(IN PFN_TYPE Page) -{ - PMMPTE PointerPte, FirstPte, LastPte; - MMPTE TempPte; - PVOID Address; - - // - // Loop hyperspace PTEs (1MB) - // - FirstPte = PointerPte = MiGetPteAddress((PVOID)HYPER_SPACE); - LastPte = PointerPte + 256; - while (PointerPte <= LastPte) - { - // - // Find a free slot - // - if (PointerPte->u.Hard.L2.Fault.Type == FaultPte) - { - // - // Use this entry - // - break; - } - - // - // Try the next one - // - PointerPte++; - } - - // - // Check if we didn't find anything - // - if (PointerPte > LastPte) return NULL; - - // - // Create the mapping - // - TempPte = MiArmTemplatePte; - TempPte.u.Hard.L2.Small.BaseAddress = Page; - ASSERT(PointerPte->u.Hard.L2.Fault.Type == FaultPte); - ASSERT(TempPte.u.Hard.L2.Small.Type == SmallPte); - *PointerPte = TempPte; - - // - // Return the address - // - Address = (PVOID)(HYPER_SPACE + ((PointerPte - FirstPte) * PAGE_SIZE)); - KeArmInvalidateTlbEntry(Address); - DPRINT("[HMAP]: %p %lx\n", Address, Page); - return Address; -} - -PFN_TYPE -NTAPI -MmDeleteHyperspaceMapping(IN PVOID Address) -{ - PFN_TYPE Pfn; - PMMPTE PointerPte; - DPRINT("[HUNMAP]: %p\n", Address); - - // - // Get the PTE - // - PointerPte = MiGetPteAddress(Address); - ASSERT(PointerPte->u.Hard.L2.Small.Type == SmallPte); - - // - // Save the PFN - // - Pfn = PointerPte->u.Hard.L2.Small.BaseAddress; - - // - // Destroy the PTE - // - PointerPte->u.Hard.AsUlong = 0; - ASSERT(PointerPte->u.Hard.L2.Fault.Type == FaultPte); - - // - // Flush the TLB entry and return the PFN - // - KeArmInvalidateTlbEntry(Address); - return Pfn; } VOID

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[ros-arm-bringup] 41925: Fix some interlock routine definitions on platforms that use it (not x86)
by ros-arm-bringup＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: ros-arm-bringup Date: Sun Jul 12 14:45:59 2009 New Revision: 41925 URL: http://svn.reactos.org/svn/reactos?rev=41925&view=rev Log: Fix some interlock routine definitions on platforms that use it (not x86) Modified: trunk/reactos/ntoskrnl/ex/fastinterlck.c Modified: trunk/reactos/ntoskrnl/ex/fastinterlck.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ex/fastinterlck.c… ============================================================================== --- trunk/reactos/ntoskrnl/ex/fastinterlck.c [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/ex/fastinterlck.c [iso-8859-1] Sun Jul 12 14:45:59 2009 @@ -19,6 +19,7 @@ #undef ExInterlockedAddULong #undef ExInterlockedIncrementLong #undef ExInterlockedDecrementLong +#undef ExInterlockedAddLargeStatistic /* FUNCTIONS ******************************************************************/ @@ -288,7 +289,7 @@ VOID FASTCALL -ExInterlockedAddLargeStatistic(IN PLARGE_INTEGER Addend, +ExInterlockedAddLargeStatistic(IN PLONGLONG Addend, IN ULONG Increment) { UNIMPLEMENTED; @@ -296,7 +297,7 @@ LONGLONG FASTCALL -ExInterlockedCompareExchange64(IN OUT PLONGLONG Destination, +ExInterlockedCompareExchange64(IN OUT LONGLONG volatile *Destination, IN PLONGLONG Exchange, IN PLONGLONG Comparand, IN PKSPIN_LOCK Lock)

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[ros-arm-bringup] 41924: Use portable ExInterlockedWhatever instead of non-portable Exf* function... the headers will do the right thing based on the arch
by ros-arm-bringup＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: ros-arm-bringup Date: Sun Jul 12 14:45:33 2009 New Revision: 41924 URL: http://svn.reactos.org/svn/reactos?rev=41924&view=rev Log: Use portable ExInterlockedWhatever instead of non-portable Exf* function... the headers will do the right thing based on the arch Modified: trunk/reactos/ntoskrnl/ex/uuid.c Modified: trunk/reactos/ntoskrnl/ex/uuid.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ex/uuid.c?rev=419… ============================================================================== --- trunk/reactos/ntoskrnl/ex/uuid.c [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/ex/uuid.c [iso-8859-1] Sun Jul 12 14:45:33 2009 @@ -239,9 +239,10 @@ PrevLuid = LuidValue; NewLuid = RtlLargeIntegerAdd(PrevLuid, LuidIncrement); - } while(ExfInterlockedCompareExchange64(&LuidValue.QuadPart, - &NewLuid.QuadPart, - &PrevLuid.QuadPart) != PrevLuid.QuadPart); + } while(ExInterlockedCompareExchange64(&LuidValue.QuadPart, + &NewLuid.QuadPart, + &PrevLuid.QuadPart, + NULL) != PrevLuid.QuadPart); LocallyUniqueId->LowPart = NewLuid.u.LowPart; LocallyUniqueId->HighPart = NewLuid.u.HighPart;

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[ros-arm-bringup] 41923: Don't try to write to "EAX" register on anything else but x86. Please write portable code in crossarch sources.
by ros-arm-bringup＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: ros-arm-bringup Date: Sun Jul 12 14:44:53 2009 New Revision: 41923 URL: http://svn.reactos.org/svn/reactos?rev=41923&view=rev Log: Don't try to write to "EAX" register on anything else but x86. Please write portable code in crossarch sources. Modified: trunk/reactos/ntoskrnl/kd/kdmain.c Modified: trunk/reactos/ntoskrnl/kd/kdmain.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/kd/kdmain.c?rev=4… ============================================================================== --- trunk/reactos/ntoskrnl/kd/kdmain.c [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/kd/kdmain.c [iso-8859-1] Sun Jul 12 14:44:53 2009 @@ -141,7 +141,13 @@ KdpServiceDispatcher(BREAKPOINT_PRINT, (PVOID)ExceptionRecord->ExceptionInformation[1], ExceptionRecord->ExceptionInformation[2]); +#ifdef _M_IX86 Context->Eax = STATUS_SUCCESS; +#elif _M_ARM + Context->R0 = STATUS_SUCCESS; +#else +#error Please be portable when modifying code +#endif } else if (ExceptionCommand == BREAKPOINT_LOAD_SYMBOLS) {

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[ros-arm-bringup] 41922: Move HYPER_SPACE definition to x86 header, since ARM already defines it (and it's somewhere else). Thi sis an arch-specific define
by ros-arm-bringup＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: ros-arm-bringup Date: Sun Jul 12 14:44:22 2009 New Revision: 41922 URL: http://svn.reactos.org/svn/reactos?rev=41922&view=rev Log: Move HYPER_SPACE definition to x86 header, since ARM already defines it (and it's somewhere else). Thi sis an arch-specific define Modified: trunk/reactos/ntoskrnl/include/internal/i386/mm.h trunk/reactos/ntoskrnl/include/internal/mm.h Modified: trunk/reactos/ntoskrnl/include/internal/i386/mm.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/include/internal/… ============================================================================== --- trunk/reactos/ntoskrnl/include/internal/i386/mm.h [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/include/internal/i386/mm.h [iso-8859-1] Sun Jul 12 14:44:22 2009 @@ -14,6 +14,7 @@ /* Base addresses of PTE and PDE */ #define PAGETABLE_MAP (0xc0000000) #define PAGEDIRECTORY_MAP (0xc0000000 + (PAGETABLE_MAP / (1024))) +#define HYPER_SPACE (0xC0400000) /* Converting address to a corresponding PDE or PTE entry */ #define MiAddressToPde(x) \ Modified: trunk/reactos/ntoskrnl/include/internal/mm.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/include/internal/… ============================================================================== --- trunk/reactos/ntoskrnl/include/internal/mm.h [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/include/internal/mm.h [iso-8859-1] Sun Jul 12 14:44:22 2009 @@ -60,8 +60,6 @@ /* Number of list heads to use */ #define MI_FREE_POOL_LISTS 4 - -#define HYPER_SPACE (0xC0400000) #define MI_HYPERSPACE_PTES (256 - 1) #define MI_ZERO_PTES (32)

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[ros-arm-bringup] 41921: These fields don't exist on ARM, so only C_ASSERT them on x86
by ros-arm-bringup＠svn.reactos.org 12 Jul '09

12 Jul '09

Author: ros-arm-bringup Date: Sun Jul 12 14:43:29 2009 New Revision: 41921 URL: http://svn.reactos.org/svn/reactos?rev=41921&view=rev Log: These fields don't exist on ARM, so only C_ASSERT them on x86 Modified: trunk/reactos/ntoskrnl/include/internal/ntoskrnl.h Modified: trunk/reactos/ntoskrnl/include/internal/ntoskrnl.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/include/internal/… ============================================================================== --- trunk/reactos/ntoskrnl/include/internal/ntoskrnl.h [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/include/internal/ntoskrnl.h [iso-8859-1] Sun Jul 12 14:43:29 2009 @@ -156,10 +156,10 @@ C_ASSERT(FIELD_OFFSET(KTHREAD, CallbackStack) == KTHREAD_CALLBACK_STACK); C_ASSERT(FIELD_OFFSET(KTHREAD, ApcState.Process) == KTHREAD_APCSTATE_PROCESS); C_ASSERT(FIELD_OFFSET(KPROCESS, DirectoryTableBase) == KPROCESS_DIRECTORY_TABLE_BASE); + +#ifdef _M_IX86 C_ASSERT(FIELD_OFFSET(KPCR, Tib.ExceptionList) == KPCR_EXCEPTION_LIST); - C_ASSERT(FIELD_OFFSET(KPCR, Self) == KPCR_SELF); -#ifdef _M_IX86 C_ASSERT(FIELD_OFFSET(KPCR, IRR) == KPCR_IRR); C_ASSERT(FIELD_OFFSET(KPCR, IDR) == KPCR_IDR); C_ASSERT(FIELD_OFFSET(KPCR, Irql) == KPCR_IRQL);

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Ros-diffs July 2009