Author: cgutman
Date: Wed May 12 04:34:04 2010
New Revision: 47162
URL: http://svn.reactos.org/svn/reactos?rev=47162&view=rev
Log:
[HAL]
- Return the correct value if the PCI slot number is invalid
- Use the bus number from the PCI BIOS instead of doing a manual probe if we can because it is much more accurate (our probing code doesn't detect buses without devices present)
- Don't probe for devices at invalid locations on PCI type 2 buses
- Check for a valid bus number so we don't return the wrong value
Modified:
trunk/reactos/hal/halx86/generic/bus/pcibus.c
Modified: trunk/reactos/hal/halx86/generic/bus/pcibus.c
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/generic/bus/pci…
==============================================================================
--- trunk/reactos/hal/halx86/generic/bus/pcibus.c [iso-8859-1] (original)
+++ trunk/reactos/hal/halx86/generic/bus/pcibus.c [iso-8859-1] Wed May 12 04:34:04 2010
@@ -360,14 +360,18 @@
(1 == BusHandler->BusNumber && 0 != Slot.u.bits.DeviceNumber))
{
DPRINT("Blacklisted PCI slot\n");
- if (0 == Offset && 2 <= Length)
+ if (0 == Offset && sizeof(USHORT) <= Length)
{
*(PUSHORT)Buffer = PCI_INVALID_VENDORID;
- return 2;
+ return sizeof(USHORT);
}
return 0;
}
#endif
+
+ /* Make sure the bus number is in our range of good bus numbers */
+ if (BusHandler->BusNumber > HalpMaxPciBus || BusHandler->BusNumber < HalpMinPciBus)
+ return 0;
/* Normalize the length */
if (Length > sizeof(PCI_COMMON_CONFIG)) Length = sizeof(PCI_COMMON_CONFIG);
@@ -390,9 +394,15 @@
/* Validate the vendor ID */
if (PciConfig->VendorID == PCI_INVALID_VENDORID)
{
- /* It's invalid, but we want to return this much */
- PciConfig->VendorID = PCI_INVALID_VENDORID;
- Len = sizeof(USHORT);
+ /* It's invalid, but we can copy PCI_INVALID_VENDORID */
+ if (Offset == 0 && Length >= sizeof(USHORT))
+ {
+ *(PUSHORT)Buffer = PCI_INVALID_VENDORID;
+ return sizeof(USHORT);
+ }
+
+ /* We can't copy PCI_INVALID_VENDORID so just return 0 */
+ return 0;
}
/* Now check if there's space left */
@@ -454,6 +464,10 @@
return 0;
}
#endif
+
+ /* Make sure this bus number is in our range of good bus numbers */
+ if (BusHandler->BusNumber > HalpMaxPciBus || BusHandler->BusNumber < HalpMinPciBus)
+ return 0;
/* Normalize the length */
if (Length > sizeof(PCI_COMMON_CONFIG)) Length = sizeof(PCI_COMMON_CONFIG);
@@ -700,7 +714,6 @@
IN ULONG Length)
{
BUS_HANDLER BusHandler;
- PPCI_COMMON_CONFIG PciData = (PPCI_COMMON_CONFIG)Buffer;
/* Setup fake PCI Bus handler */
RtlCopyMemory(&BusHandler, &HalpFakePciBusHandler, sizeof(BUS_HANDLER));
@@ -708,21 +721,6 @@
/* Read configuration data */
HalpReadPCIConfig(&BusHandler, SlotNumber, Buffer, Offset, Length);
-
- /* Check if caller only wanted at least Vendor ID */
- if (Length >= 2)
- {
- /* Validate it */
- if (PciData->VendorID != PCI_INVALID_VENDORID)
- {
- /* Check if this is the new maximum bus number */
- if (HalpMaxPciBus < BusHandler.BusNumber)
- {
- /* Set it */
- HalpMaxPciBus = BusHandler.BusNumber;
- }
- }
- }
/* Return length */
return Length;
@@ -970,6 +968,7 @@
ULONG i;
PCI_SLOT_NUMBER j;
ULONG VendorId = 0;
+ ULONG MaxPciBusNumber;
/* Query registry information */
PciRegistryInfo = HalpQueryPciRegistryInfo();
@@ -977,11 +976,19 @@
{
/* Assume type 1 */
PciType = 1;
+
+ /* Force a manual bus scan later */
+ MaxPciBusNumber = MAXULONG;
}
else
{
- /* Get the type and free the info structure */
+ /* Get the PCI type */
PciType = PciRegistryInfo->HardwareMechanism & 0xF;
+
+ /* Get MaxPciBusNumber and make it 0-based */
+ MaxPciBusNumber = PciRegistryInfo->NoBuses - 1;
+
+ /* Free the info structure */
ExFreePool(PciRegistryInfo);
}
@@ -1007,7 +1014,7 @@
/* Type 2 PCI Bus */
case 2:
- /* Copy the Type 1 handler data */
+ /* Copy the Type 2 handler data */
RtlCopyMemory(&PCIConfigHandler,
&PCIConfigHandlerType2,
sizeof (PCIConfigHandler));
@@ -1027,31 +1034,44 @@
DbgPrint("HAL: Unknown PCI type\n");
}
- /* Loop all possible buses */
- for (i = 0; i < 256; i++)
- {
- /* Loop all devices */
- for (j.u.AsULONG = 0; j.u.AsULONG < 32; j.u.AsULONG++)
- {
- /* Query the interface */
- if (HaliPciInterfaceReadConfig(NULL,
- i,
- j,
- &VendorId,
- 0,
- sizeof(ULONG)))
+ /* Run a forced bus scan if needed */
+ if (MaxPciBusNumber == MAXULONG)
+ {
+ /* Initialize the max bus number to 0xFF */
+ HalpMaxPciBus = 0xFF;
+
+ /* Initialize the counter */
+ MaxPciBusNumber = 0;
+
+ /* Loop all possible buses */
+ for (i = 0; i < HalpMaxPciBus; i++)
+ {
+ /* Loop all devices */
+ for (j.u.AsULONG = 0; j.u.AsULONG < BusData->MaxDevice; j.u.AsULONG++)
{
- /* Validate the vendor ID */
- if ((USHORT)VendorId != PCI_INVALID_VENDORID)
+ /* Query the interface */
+ if (HaliPciInterfaceReadConfig(NULL,
+ i,
+ j,
+ &VendorId,
+ 0,
+ sizeof(ULONG)))
{
- /* Set this as the maximum ID */
- HalpMaxPciBus = i;
- break;
+ /* Validate the vendor ID */
+ if ((USHORT)VendorId != PCI_INVALID_VENDORID)
+ {
+ /* Set this as the maximum ID */
+ MaxPciBusNumber = i;
+ break;
+ }
}
}
}
}
+ /* Set the real max bus number */
+ HalpMaxPciBus = MaxPciBusNumber;
+
/* We're done */
HalpPCIConfigInitialized = TRUE;
}
Author: sir_richard
Date: Wed May 12 02:40:23 2010
New Revision: 47161
URL: http://svn.reactos.org/svn/reactos?rev=47161&view=rev
Log:
[NTOS]: We might get page faults before memory areas are setup, since so much ARM3 work now gets done before the memory areas are ready to go. Since obviously these faults cannot be caused by non-ARM3 Mm, we assume them to be ARM3 faults (as long as they happened in KSEG0_BASE). Fixes a bug where early page faults in ARM3 PTEs would get treated as non-ARM3 faults and fail.
Modified:
trunk/reactos/ntoskrnl/mm/mmfault.c
Modified: trunk/reactos/ntoskrnl/mm/mmfault.c
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/mm/mmfault.c?rev=…
==============================================================================
--- trunk/reactos/ntoskrnl/mm/mmfault.c [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/mm/mmfault.c [iso-8859-1] Wed May 12 02:40:23 2010
@@ -274,15 +274,23 @@
#endif
}
- //
- // Check if this is an ARM3 memory area
- //
+ /*
+ * Check if this is an ARM3 memory area or if there's no memory area at all.
+ * The latter can happen early in the boot cycle when ARM3 paged pool is in
+ * use before having defined the memory areas proper.
+ * A proper fix would be to define memory areas in the ARM3 code, but we want
+ * to avoid adding this ReactOS-specific construct to ARM3 code.
+ * Either way, in the future, as ReactOS-paged pool is eliminated, this hack
+ * can go away.
+ */
MemoryArea = MmLocateMemoryAreaByAddress(MmGetKernelAddressSpace(), Address);
- if ((MemoryArea) && (MemoryArea->Type == MEMORY_AREA_OWNED_BY_ARM3))
+ if ((!(MemoryArea) && ((ULONG_PTR)Address >= (ULONG_PTR)MmSystemRangeStart)) ||
+ ((MemoryArea) && (MemoryArea->Type == MEMORY_AREA_OWNED_BY_ARM3)))
{
//
// Hand it off to more competent hands...
//
+ DPRINT1("ARM3 fault\n");
return MmArmAccessFault(StoreInstruction, Address, Mode, TrapInformation);
}
Author: sir_richard
Date: Wed May 12 02:38:46 2010
New Revision: 47160
URL: http://svn.reactos.org/svn/reactos?rev=47160&view=rev
Log:
[NTOS]: HEADERS: Add PDE_TOP. It is defined for IA64/AMD64 but not for i386 (in the public headers). Add a note that these addresses are bogus on PAE systems.
Modified:
trunk/reactos/ntoskrnl/include/internal/i386/mm.h
Modified: trunk/reactos/ntoskrnl/include/internal/i386/mm.h
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/include/internal/…
==============================================================================
--- trunk/reactos/ntoskrnl/include/internal/i386/mm.h [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/include/internal/i386/mm.h [iso-8859-1] Wed May 12 02:38:46 2010
@@ -14,8 +14,10 @@
#define PAGETABLE_MAP (0xc0000000)
#define PAGEDIRECTORY_MAP (0xc0000000 + (PAGETABLE_MAP / (1024)))
+/* FIXME: These are different for PAE */
#define PTE_BASE 0xC0000000
#define PDE_BASE 0xC0300000
+#define PDE_TOP 0xC0300FFF
#define PTE_TOP 0xC03FFFFF
#define HYPER_SPACE 0xC0400000
Author: sir_richard
Date: Wed May 12 02:36:52 2010
New Revision: 47159
URL: http://svn.reactos.org/svn/reactos?rev=47159&view=rev
Log:
[NTOS]: Restore previous correct ASM behavior of checking for success codes, not only STATUS_SUCCESS, after a page fault. For example, a demand zero fault returns STATUS_PAGE_FAULT_DEMAND_ZERO upon success, and the new C code would treat it as a failure. Fixes a bug.
Modified:
trunk/reactos/ntoskrnl/ke/i386/traphdlr.c
Modified: trunk/reactos/ntoskrnl/ke/i386/traphdlr.c
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/i386/traphdlr.…
==============================================================================
--- trunk/reactos/ntoskrnl/ke/i386/traphdlr.c [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/ke/i386/traphdlr.c [iso-8859-1] Wed May 12 02:36:52 2010
@@ -1206,7 +1206,7 @@
(PVOID)Cr2,
TrapFrame->SegCs & MODE_MASK,
TrapFrame);
- if (Status == STATUS_SUCCESS) KiEoiHelper(TrapFrame);
+ if (NT_SUCCESS(Status)) KiEoiHelper(TrapFrame);
/* Check for S-LIST fault */
if (TrapFrame->Eip == (ULONG_PTR)ExpInterlockedPopEntrySListFault)