Ros-diffs November 2020

ros-diffs@reactos.org

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[reactos] 02/09: [NTOS:MM:X64] On x64 reserve the address range between FFFF800000000000 and FFFFF68000000000 in MiInitSystemMemoryAreas()

by Timo Kreuzer

https://git.reactos.org/?p=reactos.git;a=commitdiff;h=a5d47ff72b16fb2b8f07e… commit a5d47ff72b16fb2b8f07e702580a04b2154a938b Author: Timo Kreuzer <timo.kreuzer(a)reactos.org> AuthorDate: Mon Jan 29 12:39:21 2018 +0100 Commit: Timo Kreuzer <timo.kreuzer(a)reactos.org> CommitDate: Sun Nov 1 09:32:27 2020 +0100 [NTOS:MM:X64] On x64 reserve the address range between FFFF800000000000 and FFFFF68000000000 in MiInitSystemMemoryAreas() --- ntoskrnl/mm/mminit.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/ntoskrnl/mm/mminit.c b/ntoskrnl/mm/mminit.c index 4005b34e0f9..3bb75db87ea 100644 --- a/ntoskrnl/mm/mminit.c +++ b/ntoskrnl/mm/mminit.c @@ -70,6 +70,11 @@ MiInitSystemMemoryAreas(VOID) // Create all the static memory areas. // +#ifdef _M_AMD64 + // Reserved range FFFF800000000000 - FFFFF68000000000 + MiCreateArm3StaticMemoryArea((PVOID)MI_REAL_SYSTEM_RANGE_START, PTE_BASE - MI_REAL_SYSTEM_RANGE_START, FALSE); +#endif /* _M_AMD64 */ + // The loader mappings. The only Executable area. MiCreateArm3StaticMemoryArea((PVOID)KSEG0_BASE, MmBootImageSize, TRUE);

4 years, 1 month

[reactos] 01/09: [NTOS:MM:X64] Improve x64 Mm initialization

by Timo Kreuzer

https://git.reactos.org/?p=reactos.git;a=commitdiff;h=a8ba58fbb0215b838fc8d… commit a8ba58fbb0215b838fc8d166b87726568fe01d06 Author: Timo Kreuzer <timo.kreuzer(a)reactos.org> AuthorDate: Mon Jan 29 12:33:49 2018 +0100 Commit: Timo Kreuzer <timo.kreuzer(a)reactos.org> CommitDate: Sun Nov 1 09:32:27 2020 +0100 [NTOS:MM:X64] Improve x64 Mm initialization * Move MiBuildPfnDatabaseFromPageTables into MiBuildPfnDatabase * Make sure to call MmInitializeProcessAddressSpace() from the x64 version of MiInitMachineDependent() * Handle result of MmInitializeProcessAddressSpace in MiInitMachineDependent (Should do the same for x86) * Remove obsolete x64 debug print --- ntoskrnl/mm/amd64/init.c | 47 +++++++++++++++++++++++++++++------------------ 1 file changed, 29 insertions(+), 18 deletions(-) diff --git a/ntoskrnl/mm/amd64/init.c b/ntoskrnl/mm/amd64/init.c index 9eaed0a75fd..f56816c76e4 100644 --- a/ntoskrnl/mm/amd64/init.c +++ b/ntoskrnl/mm/amd64/init.c @@ -424,8 +424,9 @@ MiSetupPfnForPageTable( Pfn->u2.ShareCount++; } +static VOID -NTAPI +INIT_FUNCTION MiBuildPfnDatabaseFromPageTables(VOID) { PVOID Address = NULL; @@ -525,15 +526,14 @@ MiBuildPfnDatabaseFromPageTables(VOID) } INIT_FUNCTION +static VOID -NTAPI MiAddDescriptorToDatabase( PFN_NUMBER BasePage, PFN_NUMBER PageCount, TYPE_OF_MEMORY MemoryType) { PMMPFN Pfn; - KIRQL OldIrql; ASSERT(!MiIsMemoryTypeInvisible(MemoryType)); @@ -543,22 +543,16 @@ MiAddDescriptorToDatabase( /* Get the last pfn of this descriptor. Note we loop backwards */ Pfn = &MmPfnDatabase[BasePage + PageCount - 1]; - /* Lock the PFN Database */ - OldIrql = MiAcquirePfnLock(); - /* Loop all pages */ while (PageCount--) { /* Add it to the free list */ - Pfn->u3.e1.CacheAttribute = MiNonCached; + Pfn->u3.e1.CacheAttribute = MiNonCached; // FIXME: Windows ASSERTs MiChached, but why not MiNotMapped? MiInsertPageInFreeList(BasePage + PageCount); /* Go to the previous page */ Pfn--; } - - /* Release PFN database */ - MiReleasePfnLock(OldIrql); } else if (MemoryType == LoaderXIPRom) { @@ -589,8 +583,6 @@ MiAddDescriptorToDatabase( else { /* For now skip it */ - DbgPrint("Skipping BasePage=0x%lx, PageCount=0x%lx, MemoryType=%lx\n", - BasePage, PageCount, MemoryType); Pfn = &MmPfnDatabase[BasePage]; while (PageCount--) { @@ -611,6 +603,10 @@ MiBuildPfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock) PLIST_ENTRY ListEntry; PMEMORY_ALLOCATION_DESCRIPTOR Descriptor; PFN_NUMBER BasePage, PageCount; + KIRQL OldIrql; + + /* Lock the PFN Database */ + OldIrql = MiAcquirePfnLock(); /* Map the PDEs and PPEs for the pfn database (ignore holes) */ #if (_MI_PAGING_LEVELS >= 3) @@ -668,6 +664,15 @@ MiBuildPfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock) /* Reset the descriptor back so we can create the correct memory blocks */ *MxFreeDescriptor = MxOldFreeDescriptor; + + /* Now process the page tables */ + MiBuildPfnDatabaseFromPageTables(); + + /* PFNs are initialized now! */ + MiPfnsInitialized = TRUE; + + /* Release PFN database */ + MiReleasePfnLock(OldIrql); } INIT_FUNCTION @@ -675,6 +680,9 @@ NTSTATUS NTAPI MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock) { + NTSTATUS Status; + ULONG Flags; + ASSERT(MxPfnAllocation != 0); /* Set some hardcoded addresses */ @@ -701,15 +709,18 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock) /* Map the PFN database pages */ MiBuildPfnDatabase(LoaderBlock); - /* Now process the page tables */ - MiBuildPfnDatabaseFromPageTables(); - - /* PFNs are initialized now! */ - MiPfnsInitialized = TRUE; - /* Initialize the nonpaged pool */ InitializePool(NonPagedPool, 0); + /* Initialize the bogus address space */ + Flags = 0; + Status = MmInitializeProcessAddressSpace(PsGetCurrentProcess(), NULL, NULL, &Flags, NULL); + if (!NT_SUCCESS(Status)) + { + DPRINT1("MmInitializeProcessAddressSpace(9 failed: 0x%lx\n", Status); + return Status; + } + /* Initialize the balancer */ MmInitializeBalancer((ULONG)MmAvailablePages, 0);

4 years, 1 month

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Ros-diffs November 2020