[ros-diffs] [fireball] 29558: - Fixed a typo in the line which lead to actual zeroing of mxcsr, instead of zeroing only reserved bits (spotted by Kamil Hornicek aka "Pigglesworth"). - Improved the fix by actually applying the mask prepared earlier during kernel init (this is a more proper way to clear reserved bits of mxcsr). - SSE/SSE2/etc is not broken anymore. See issue #2748 for more details.

Author: fireball
Date: Sun Oct 14 16:20:48 2007
New Revision: 29558

URL: http://svn.reactos.org/svn/reactos?rev=29558&view=rev
Log:
- Fixed a typo in the line which lead to actual zeroing of mxcsr, instead of zeroing only reserved bits (spotted by Kamil Hornicek aka "Pigglesworth").
- Improved the fix by actually applying the mask prepared earlier during kernel init (this is a more proper way to clear reserved bits of mxcsr).
- SSE/SSE2/etc is not broken anymore.
See issue #2748 for more details.

Modified:
    trunk/reactos/ntoskrnl/ke/i386/exp.c

Modified: trunk/reactos/ntoskrnl/ke/i386/exp.c
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/i386/exp.c?rev=...
==============================================================================
--- trunk/reactos/ntoskrnl/ke/i386/exp.c (original)
+++ trunk/reactos/ntoskrnl/ke/i386/exp.c Sun Oct 14 16:20:48 2007
@@ -460,7 +460,7 @@
                           MAXIMUM_SUPPORTED_EXTENSION);

/* Remove reserved bits from MXCSR */
-            FxSaveArea->U.FxArea.MXCsr &= ~0xFFBF;
+            FxSaveArea->U.FxArea.MXCsr &= KiMXCsrMask;

/* Mask out any invalid flags */
             FxSaveArea->Cr0NpxState &= ~(CR0_EM | CR0_MP | CR0_TS);