https://git.reactos.org/?p=reactos.git;a=commitdiff;h=6f4be52a1c710ac062d35…
commit 6f4be52a1c710ac062d35a8c9083c0dcec69827e
Author: Dmitry Borisov <di.sean(a)protonmail.com>
AuthorDate: Thu May 26 19:40:17 2022 +0600
Commit: GitHub <noreply(a)github.com>
CommitDate: Thu May 26 16:40:17 2022 +0300
[HALX86] Print the correct size of the BAR in HalpDebugPciDumpBus()
Reference:
https://wiki.osdev.org/PCI#Address_and_size_of_the_BAR
To determine the amount of address space needed by a PCI device,
you must save the original value of the BAR, write a value
of all 1's to the register, then read it back.
Note: 64-bit BARs are not supported yet.
---
hal/halx86/include/halp.h | 2 ++
hal/halx86/legacy/bussupp.c | 32 ++++++++++++++++++++++++++------
2 files changed, 28 insertions(+), 6 deletions(-)
diff --git a/hal/halx86/include/halp.h b/hal/halx86/include/halp.h
index 62d0254773e..5446482dfc8 100644
--- a/hal/halx86/include/halp.h
+++ b/hal/halx86/include/halp.h
@@ -516,6 +516,8 @@ CODE_SEG("INIT")
VOID
NTAPI
HalpDebugPciDumpBus(
+ IN PBUS_HANDLER BusHandler,
+ IN PCI_SLOT_NUMBER PciSlot,
IN ULONG i,
IN ULONG j,
IN ULONG k,
diff --git a/hal/halx86/legacy/bussupp.c b/hal/halx86/legacy/bussupp.c
index 97b535285d3..f967ece635c 100644
--- a/hal/halx86/legacy/bussupp.c
+++ b/hal/halx86/legacy/bussupp.c
@@ -787,7 +787,9 @@ ShowSize(ULONG x)
CODE_SEG("INIT")
VOID
NTAPI
-HalpDebugPciDumpBus(IN ULONG i,
+HalpDebugPciDumpBus(IN PBUS_HANDLER BusHandler,
+ IN PCI_SLOT_NUMBER PciSlot,
+ IN ULONG i,
IN ULONG j,
IN ULONG k,
IN PPCI_COMMON_CONFIG PciData)
@@ -963,12 +965,30 @@ HalpDebugPciDumpBus(IN ULONG i,
Mem = 0;
if (Mem)
{
+ ULONG PciBar = 0xFFFFFFFF;
+
+ HalpWritePCIConfig(BusHandler,
+ PciSlot,
+ &PciBar,
+ FIELD_OFFSET(PCI_COMMON_HEADER,
u.type0.BaseAddresses[b]),
+ sizeof(ULONG));
+ HalpReadPCIConfig(BusHandler,
+ PciSlot,
+ &PciBar,
+ FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[b]),
+ sizeof(ULONG));
+ HalpWritePCIConfig(BusHandler,
+ PciSlot,
+ &Mem,
+ FIELD_OFFSET(PCI_COMMON_HEADER,
u.type0.BaseAddresses[b]),
+ sizeof(ULONG));
+
/* Decode the address type */
- if (Mem & PCI_ADDRESS_IO_SPACE)
+ if (PciBar & PCI_ADDRESS_IO_SPACE)
{
/* Guess the size */
Size = 1 << 2;
- while (!(Mem & Size) && (Size)) Size <<= 1;
+ while (!(PciBar & Size) && (Size)) Size <<= 1;
/* Print it out */
DbgPrint("\tI/O ports at %04lx", Mem &
PCI_ADDRESS_IO_ADDRESS_MASK);
@@ -977,8 +997,8 @@ HalpDebugPciDumpBus(IN ULONG i,
else
{
/* Guess the size */
- Size = 1 << 8;
- while (!(Mem & Size) && (Size)) Size <<= 1;
+ Size = 1 << 4;
+ while (!(PciBar & Size) && (Size)) Size <<= 1;
/* Print it out */
DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)",
@@ -1102,7 +1122,7 @@ HalpInitializePciBus(VOID)
if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
/* Print out the entry */
- HalpDebugPciDumpBus(i, j, k, PciData);
+ HalpDebugPciDumpBus(BusHandler, PciSlot, i, j, k, PciData);
/* Check if this is a Cardbus bridge */
if (PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE)