29 Oct
2008
29 Oct
'08
1:43 p.m.
Author: hyperion
Date: Wed Oct 29 08:43:31 2008
New Revision: 37057
URL: http://svn.reactos.org/svn/reactos?rev=37057&view=rev
Log:
added include/crt/mingw32/intrin.h
added include/crt/mingw32/intrin_arm.h
added include/crt/mingw32/intrin_ppc.h
added include/crt/mingw32/intrin_x86.h
added include/crt/mingw32/intrin_x86_64.h
deleted include/psdk/intrin.h.bak
deleted include/psdk/intrin_arm.h
deleted include/psdk/intrin_ppc.h
deleted include/psdk/intrin_x86.h
deleted include/psdk/intrin_x86_64.h
Moved <intrin.h> from PSDK to MinGW backend, where it belongs
modified ReactOS-generic.rbuild
modified tools/rbuild/backend/mingw/modulehandler.cpp
Don't compile against an external CRT, it's just not worth it
ReactOS is compiled with MinGW: to support new compilers, port MinGW
modified tools/rbuild/backend/mingw/mingw.cpp
Disable more warnings. This should really go in a standard header file or a response
file
Added:
branches/the-real-msvc/include/crt/mingw32/intrin.h (props changed)
- copied unchanged from r36960, branches/the-real-msvc/include/psdk/intrin.h
branches/the-real-msvc/include/crt/mingw32/intrin_arm.h (props changed)
- copied unchanged from r36960, branches/the-real-msvc/include/psdk/intrin_arm.h
branches/the-real-msvc/include/crt/mingw32/intrin_ppc.h (props changed)
- copied unchanged from r36960, branches/the-real-msvc/include/psdk/intrin_ppc.h
branches/the-real-msvc/include/crt/mingw32/intrin_x86.h (props changed)
- copied unchanged from r36960, branches/the-real-msvc/include/psdk/intrin_x86.h
branches/the-real-msvc/include/crt/mingw32/intrin_x86_64.h (props changed)
- copied unchanged from r36960, branches/the-real-msvc/include/psdk/intrin_x86_64.h
Removed:
branches/the-real-msvc/include/psdk/intrin.h.bak
branches/the-real-msvc/include/psdk/intrin_arm.h
branches/the-real-msvc/include/psdk/intrin_ppc.h
branches/the-real-msvc/include/psdk/intrin_x86.h
branches/the-real-msvc/include/psdk/intrin_x86_64.h
Modified:
branches/the-real-msvc/ReactOS-generic.rbuild
branches/the-real-msvc/tools/rbuild/backend/mingw/mingw.cpp
branches/the-real-msvc/tools/rbuild/backend/mingw/modulehandler.cpp
Modified: branches/the-real-msvc/ReactOS-generic.rbuild
URL:
http://svn.reactos.org/svn/reactos/branches/the-real-msvc/ReactOS-generic.r…
==============================================================================
--- branches/the-real-msvc/ReactOS-generic.rbuild [iso-8859-1] (original)
+++ branches/the-real-msvc/ReactOS-generic.rbuild [iso-8859-1] Wed Oct 29 08:43:31 2008
@@ -64,8 +64,8 @@
<include root="intermediate">include/psdk</include>
<include>include/dxsdk</include>
<include root="intermediate">include/dxsdk</include>
- <!--<include>include/crt</include>-->
- <!--<include>include/crt/mingw32</include>-->
+ <include>include/crt</include>
+ <include>include/crt/msc</include>
<include>include/ddk</include>
<include>include/GL</include>
<include>include/ndk</include>
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin.h
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin.h
------------------------------------------------------------------------------
svn:mergeinfo =
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin_arm.h
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin_arm.h
------------------------------------------------------------------------------
svn:mergeinfo =
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin_arm.h
------------------------------------------------------------------------------
svn:mime-type = text/plain
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin_ppc.h
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin_ppc.h
------------------------------------------------------------------------------
svn:mergeinfo =
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin_x86.h
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin_x86.h
------------------------------------------------------------------------------
svn:mergeinfo =
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin_x86_64.h
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: branches/the-real-msvc/include/crt/mingw32/intrin_x86_64.h
------------------------------------------------------------------------------
svn:mergeinfo =
Removed: branches/the-real-msvc/include/psdk/intrin.h.bak
URL:
http://svn.reactos.org/svn/reactos/branches/the-real-msvc/include/psdk/intr…
==============================================================================
--- branches/the-real-msvc/include/psdk/intrin.h.bak [iso-8859-1] (original)
+++ branches/the-real-msvc/include/psdk/intrin.h.bak (removed)
@@ -1,96 +1,0 @@
-/*
- Compatibility <intrin.h> header for GCC -- GCC equivalents of intrinsic
- Microsoft Visual C++ functions. Originally developed for the ReactOS
- (<http://www.reactos.org/>) and TinyKrnl (<http://www.tinykrnl.org/>)
- projects.
-
- Copyright (c) 2006 KJK::Hyperion <hackbunny(a)reactos.com>
-
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the "Software"),
- to deal in the Software without restriction, including without limitation
- the rights to use, copy, modify, merge, publish, distribute, sublicense,
- and/or sell copies of the Software, and to permit persons to whom the
- Software is furnished to do so, subject to the following conditions:
-
- The above copyright notice and this permission notice shall be included in
- all copies or substantial portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- DEALINGS IN THE SOFTWARE.
-*/
-
-#ifndef KJK_INTRIN_H_
-#define KJK_INTRIN_H_
-
-#ifndef __GNUC__
-#error Unsupported compiler
-#endif
-
-/*
- FIXME: review all "memory" clobbers, add/remove to match Visual C++
- behavior: some "obvious" memory barriers are not present in the Visual C++
- implementation - e.g. __stosX; on the other hand, some memory barriers that
- *are* present could have been missed
-*/
-
-/*
- NOTE: this is a *compatibility* header. Some functions may look wrong at
- first, but they're only "as wrong" as they would be on Visual C++. Our
- priority is compatibility
-
- NOTE: unlike most people who write inline asm for GCC, I didn't pull the
- constraints and the uses of __volatile__ out of my... hat. Do not touch
- them. I hate cargo cult programming
-
- NOTE: be very careful with declaring "memory" clobbers. Some
"obvious"
- barriers aren't there in Visual C++ (e.g. __stosX)
-
- NOTE: review all intrinsics with a return value, add/remove __volatile__
- where necessary. If an intrinsic whose value is ignored generates a no-op
- under Visual C++, __volatile__ must be omitted; if it always generates code
- (for example, if it has side effects), __volatile__ must be specified. GCC
- will only optimize out non-volatile asm blocks with outputs, so input-only
- blocks are safe. Oddities such as the non-volatile 'rdmsr' are intentional
- and follow Visual C++ behavior
-
- NOTE: on GCC 4.1.0, please use the __sync_* built-ins for barriers and
- atomic operations. Test the version like this:
-
- #if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
- ...
-
- Pay attention to the type of barrier. Make it match with what Visual C++
- would use in the same case
-*/
-
-#if defined(__i386__)
-#include "intrin_x86.h"
-#elif defined(_PPC_)
-#include "intrin_ppc.h"
-#elif defined(_MIPS_)
-#include "intrin_mips.h"
-#elif defined(_M_ARM)
-#include "intrin_arm.h"
-#elif defined(__x86_64__)
-/* TODO: the x64 architecture shares most of the i386 intrinsics. It should be easy to
support */
-#include "intrin_x86.h"
-#else
-#error Unsupported architecture
-#endif
-
-
-/*** Miscellaneous ***/
-/* BUGBUG: only good for use in macros. Cannot be taken the address of */
-#define __noop(...) ((void)0)
-
-/* TODO: __assume. GCC only supports the weaker __builtin_expect */
-
-#endif
-
-/* EOF */
Removed: branches/the-real-msvc/include/psdk/intrin_arm.h
URL:
http://svn.reactos.org/svn/reactos/branches/the-real-msvc/include/psdk/intr…
==============================================================================
--- branches/the-real-msvc/include/psdk/intrin_arm.h [iso-8859-1] (original)
+++ branches/the-real-msvc/include/psdk/intrin_arm.h (removed)
@@ -1,315 +1,0 @@
-/*
- Compatibility <intrin.h> header for GCC -- GCC equivalents of intrinsic
- Microsoft Visual C++ functions. Originally developed for the ReactOS
- (<http://www.reactos.org/>) and TinyKrnl (<http://www.tinykrnl.org/>)
- projects.
-
- Copyright (c) 2006 KJK::Hyperion <hackbunny(a)reactos.com>
-
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the "Software"),
- to deal in the Software without restriction, including without limitation
- the rights to use, copy, modify, merge, publish, distribute, sublicense,
- and/or sell copies of the Software, and to permit persons to whom the
- Software is furnished to do so, subject to the following conditions:
-
- The above copyright notice and this permission notice shall be included in
- all copies or substantial portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- DEALINGS IN THE SOFTWARE.
-*/
-
-#ifndef KJK_INTRIN_ARM_H_
-#define KJK_INTRIN_ARM_H_
-
-#ifndef __GNUC__
-#error Unsupported compiler
-#endif
-
-#define _ReadWriteBarrier() __sync_synchronize()
-
-static __inline__ __attribute__((always_inline)) long
_InterlockedCompareExchange(volatile long * const dest, const long exch, const long comp)
-{
- long a, b;
-
- __asm__ __volatile__ ( "0:\n\t"
- "ldr %1, [%2]\n\t"
- "cmp %1, %4\n\t"
- "bne 1f\n\t"
- "swp %0, %3, [%2]\n\t"
- "cmp %0, %1\n\t"
- "swpne %3, %0, [%2]\n\t"
- "bne 0b\n\t"
- "1:"
- : "=&r" (a), "=&r" (b)
- : "r" (dest), "r" (exch), "r"
(comp)
- : "cc", "memory");
-
- return a;
-}
-
-static __inline__ __attribute__((always_inline)) long long
_InterlockedCompareExchange64(volatile long long * const dest, const long long exch, const
long long comp)
-{
- //
- // FIXME
- //
- long long result;
- result = *dest;
- if (*dest == comp) *dest = exch;
- return result;
-}
-
-static __inline__ __attribute__((always_inline)) void *
_InterlockedCompareExchangePointer(void * volatile * const Destination, void * const
Exchange, void * const Comperand)
-{
- return (void*)_InterlockedCompareExchange((volatile long* const)Destination, (const
long)Exchange, (const long)Comperand);
-}
-
-
-static __inline__ __attribute__((always_inline)) long _InterlockedExchangeAdd(volatile
long * const dest, const long add)
-{
- long a, b, c;
-
- __asm__ __volatile__ ( "0:\n\t"
- "ldr %0, [%3]\n\t"
- "add %1, %0, %4\n\t"
- "swp %2, %1, [%3]\n\t"
- "cmp %0, %2\n\t"
- "swpne %1, %2, [%3]\n\t"
- "bne 0b"
- : "=&r" (a), "=&r" (b),
"=&r" (c)
- : "r" (dest), "r" (add)
- : "cc", "memory");
-
- return a;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedExchange(volatile long
* const dest, const long exch)
-{
- long a;
-
- __asm__ __volatile__ ( "swp %0, %2, [%1]"
- : "=&r" (a)
- : "r" (dest), "r" (exch));
-
- return a;
-}
-
-
-static __inline__ __attribute__((always_inline)) void * _InterlockedExchangePointer(void
* volatile * const Target, void * const Value)
-{
- return _InterlockedExchange(Target, Value);
-}
-
-static __inline__ __attribute__((always_inline)) char _InterlockedAnd8(volatile char *
const value, const char mask)
-{
- char x;
- char y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange8(value, x & mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) short _InterlockedAnd16(volatile short *
const value, const short mask)
-{
- short x;
- short y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange16(value, x & mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedAnd(volatile long *
const value, const long mask)
-{
- long x;
- long y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange(value, x & mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) char _InterlockedOr8(volatile char *
const value, const char mask)
-{
- char x;
- char y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange8(value, x | mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) short _InterlockedOr16(volatile short *
const value, const short mask)
-{
- short x;
- short y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange16(value, x | mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedOr(volatile long *
const value, const long mask)
-{
- long x;
- long y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange(value, x | mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) char _InterlockedXor8(volatile char *
const value, const char mask)
-{
- char x;
- char y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange8(value, x ^ mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) short _InterlockedXor16(volatile short *
const value, const short mask)
-{
- short x;
- short y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange16(value, x ^ mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedXor(volatile long *
const value, const long mask)
-{
- long x;
- long y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange(value, x ^ mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedDecrement(volatile long
* const lpAddend)
-{
- return _InterlockedExchangeAdd(lpAddend, -1) - 1;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedIncrement(volatile long
* const lpAddend)
-{
- return _InterlockedExchangeAdd(lpAddend, 1) + 1;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedDecrement16(volatile
short * const lpAddend)
-{
- return _InterlockedExchangeAdd16(lpAddend, -1) - 1;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedIncrement16(volatile
short * const lpAddend)
-{
- return _InterlockedExchangeAdd16(lpAddend, 1) + 1;
-}
-
-static __inline__ __attribute__((always_inline)) void _disable(void)
-{
- __asm__ __volatile__
- (
- "mrs r1, cpsr;"
- "orr r1, r1, #0x80;"
- "msr cpsr, r1;"
- );
-}
-
-static __inline__ __attribute__((always_inline)) void _enable(void)
-{
- __asm__ __volatile__
- (
- "mrs r1, cpsr;"
- "bic r1, r1, #0x80;"
- "msr cpsr, r1;"
- );
-}
-
-#ifndef __MSVCRT__
-static __inline__ __attribute__((always_inline)) unsigned long _rotl(const unsigned long
value, const unsigned char shift)
-{
- return (((value) << ((int)(shift))) | ((value) >> (32 - (int)(shift))));
-}
-#endif
-
-#define _clz(a) \
-({ ULONG __value, __arg = (a); \
-asm ("clz\t%0, %1": "=r" (__value): "r" (__arg)); \
-__value; })
-
-#endif
-/* EOF */
Removed: branches/the-real-msvc/include/psdk/intrin_ppc.h
URL:
http://svn.reactos.org/svn/reactos/branches/the-real-msvc/include/psdk/intr…
==============================================================================
--- branches/the-real-msvc/include/psdk/intrin_ppc.h [iso-8859-1] (original)
+++ branches/the-real-msvc/include/psdk/intrin_ppc.h (removed)
@@ -1,791 +1,0 @@
-/*
- Compatibility <intrin.h> header for GCC -- GCC equivalents of intrinsic
- Microsoft Visual C++ functions. Originally developed for the ReactOS
- (<http://www.reactos.org/>) and TinyKrnl (<http://www.tinykrnl.org/>)
- projects.
-
- Copyright (c) 2006 KJK::Hyperion <hackbunny(a)reactos.com>
-
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the "Software"),
- to deal in the Software without restriction, including without limitation
- the rights to use, copy, modify, merge, publish, distribute, sublicense,
- and/or sell copies of the Software, and to permit persons to whom the
- Software is furnished to do so, subject to the following conditions:
-
- The above copyright notice and this permission notice shall be included in
- all copies or substantial portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- DEALINGS IN THE SOFTWARE.
-*/
-
-#ifndef KJK_INTRIN_PPC_H_
-#define KJK_INTRIN_PPC_H_
-
-//#define PPC_QUAL static __inline__ __attribute__((always_inline))
-#define PPC_QUAL extern __inline__
-
-#ifndef __GNUC__
-#error Unsupported compiler
-#endif
-
-/*** Stack frame juggling ***/
-#define _ReturnAddress() (__builtin_return_address(0))
-#define _AddressOfReturnAddress() (&(((void **)(__builtin_frame_address(0)))[1]))
-/* TODO: __getcallerseflags but how??? */
-
-
-/*** Atomic operations ***/
-/* TODO: _ReadBarrier */
-/* TODO: _WriteBarrier */
-
-#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
-#define _ReadWriteBarrier() __sync_synchronize()
-#else
-/* TODO: _ReadWriteBarrier() */
-#endif
-
-#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
-
-PPC_QUAL char _InterlockedCompareExchange8(volatile char * const Destination, const char
Exchange, const char Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-PPC_QUAL short _InterlockedCompareExchange16(volatile short * const Destination, const
short Exchange, const short Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-PPC_QUAL long _InterlockedCompareExchange(volatile long * const Destination, const long
Exchange, const long Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-PPC_QUAL long long _InterlockedCompareExchange64(volatile long long * const Destination,
const long long Exchange, const long long Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-PPC_QUAL void * _InterlockedCompareExchangePointer(void * volatile * const Destination,
void * const Exchange, void * const Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-PPC_QUAL long _InterlockedExchange(volatile long * const Target, const long Value)
-{
- /* NOTE: __sync_lock_test_and_set would be an acquire barrier, so we force a full
barrier */
- __sync_synchronize();
- return __sync_lock_test_and_set(Target, Value);
-}
-
-PPC_QUAL void * _InterlockedExchangePointer(void * volatile * const Target, void * const
Value)
-{
- /* NOTE: ditto */
- __sync_synchronize();
- return __sync_lock_test_and_set(Target, Value);
-}
-
-PPC_QUAL long _InterlockedExchangeAdd(volatile long * const Addend, const long Value)
-{
- return __sync_fetch_and_add(Addend, Value);
-}
-
-PPC_QUAL char _InterlockedAnd8(volatile char * const value, const char mask)
-{
- return __sync_fetch_and_and(value, mask);
-}
-
-PPC_QUAL short _InterlockedAnd16(volatile short * const value, const short mask)
-{
- return __sync_fetch_and_and(value, mask);
-}
-
-PPC_QUAL long _InterlockedAnd(volatile long * const value, const long mask)
-{
- return __sync_fetch_and_and(value, mask);
-}
-
-PPC_QUAL char _InterlockedOr8(volatile char * const value, const char mask)
-{
- return __sync_fetch_and_or(value, mask);
-}
-
-PPC_QUAL short _InterlockedOr16(volatile short * const value, const short mask)
-{
- return __sync_fetch_and_or(value, mask);
-}
-
-PPC_QUAL long _InterlockedOr(volatile long * const value, const long mask)
-{
- return __sync_fetch_and_or(value, mask);
-}
-
-PPC_QUAL char _InterlockedXor8(volatile char * const value, const char mask)
-{
- return __sync_fetch_and_xor(value, mask);
-}
-
-PPC_QUAL short _InterlockedXor16(volatile short * const value, const short mask)
-{
- return __sync_fetch_and_xor(value, mask);
-}
-
-PPC_QUAL long _InterlockedXor(volatile long * const value, const long mask)
-{
- return __sync_fetch_and_xor(value, mask);
-}
-
-#else
-
-PPC_QUAL char _InterlockedCompareExchange8(volatile char * const Destination, const char
Exchange, const char Comperand)
-{
- volatile long retval __asm__("r8") = 0;
- __asm__ __volatile__ (
- "sync\n"
- "1: lbarx %0,0,%1\n"
- : "=r" (retval) : "r" (Destination));
- __asm__ __volatile__ (
- " cmpw %3,%1\n"
- " bne- 2f\n"
- " stbcx. %2,0,%0\n"
- " bne- 1b\n"
- "2: isync"
- :
- : "r" (Destination), "r" (Comperand), "r" (Exchange),
"r" (retval));
- return retval;
-}
-
-PPC_QUAL short _InterlockedCompareExchange16(volatile short * const Destination, const
short Exchange, const short Comperand)
-{
- volatile long retval __asm__("r8") = 0;
- __asm__ __volatile__ (
- "sync\n"
- "1: lharx %0,0,%1\n"
- : "=&r" (retval) : "r" (Destination));
- __asm__ __volatile__ (
- " cmpw %3,%1\n"
- " bne- 2f\n"
- " sthcx. %2,0,%0\n"
- " bne- 1b\n"
- "2: isync"
- :
- : "r" (Destination), "r" (Comperand), "r" (Exchange),
"r" (retval));
- return retval;
-}
-
-PPC_QUAL long _InterlockedCompareExchange(volatile long * const Destination, const long
Exchange, const long Comperand)
-{
- volatile long retval __asm__("r8") = 0;
- __asm__ __volatile__ (
- "sync\n"
- "1: lwarx %0,0,%1\n"
- : "=&r" (retval) : "r" (Destination));
- __asm__ __volatile__ (
- " cmpw %3,%1\n"
- " bne- 2f\n"
- " stwcx. %2,0,%0\n"
- " bne- 1b\n"
- "2: isync"
- :
- : "r" (Destination), "r" (Comperand), "r" (Exchange),
"r" (retval));
- return retval;
-}
-
-PPC_QUAL long long _InterlockedCompareExchange64(volatile long long * const Target, const
long long Exchange, const long long Comperand)
-{
- long long capture = *Target;
- if (*Target == Comperand) *Target = Exchange;
- return capture;
-}
-
-PPC_QUAL void * _InterlockedCompareExchangePointer(void * volatile * const Destination,
void * const Exchange, void * const Comperand)
-{
- return (void *)_InterlockedCompareExchange
- ((long *)Destination, (long) Exchange, (long) Comperand);
-}
-
-PPC_QUAL long _InterlockedExchange(volatile long * const Target, const long Value)
-{
- long retval __asm__("r8");
- __asm__ __volatile__ (
- "sync\n"
- "1: lwarx 8,0,3\n"
- " stwcx. 4,0,3\n"
- " bne- 1b\n"
- " mr 3,8\n"
- : "=b" (retval)
- : "b" (Target), "b" (Value)
- : "cr0", "memory");
- return retval;
-}
-
-PPC_QUAL void * _InterlockedExchangePointer(void * volatile * const Target, void * const
Value)
-{
- return (void *)_InterlockedExchange((long *)Target, (long)Value);
-}
-
-#define PPC_MakeInterlockedFunction(type,name,op,proto) \
-PPC_QUAL type name proto \
-{ \
- long addend, y; \
- do \
- { \
- addend = *value; \
- y = _InterlockedCompareExchange(value, addend op modify, addend); \
- } \
- while(y != addend); \
- \
- return y; \
-}
-
-PPC_QUAL unsigned char _interlockedbittestandreset(volatile long * const a, const long
b)
-{
- long x;
- long y;
- long mask = ~(1<<b);
-
- do
- {
- x = *a;
- y = _InterlockedCompareExchange(a, x & mask, x);
- }
- while(y != x);
-
- return (y & ~mask) != 0;
-}
-
-PPC_MakeInterlockedFunction(long,_InterlockedExchangeAdd,+,(volatile long * const value,
const long modify))
-PPC_MakeInterlockedFunction(char,_InterlockedAnd8,&,(volatile char * const value,
const char modify))
-PPC_MakeInterlockedFunction(short,_InterlockedAnd16,&,(volatile short * const value,
const short modify))
-PPC_MakeInterlockedFunction(long,_InterlockedAnd,&,(volatile long * const value,
const long modify))
-PPC_MakeInterlockedFunction(char,_InterlockedOr8,|,(volatile char * const value, const
char modify))
-PPC_MakeInterlockedFunction(short,_InterlockedOr16,|,(volatile short * const value, const
short modify))
-PPC_MakeInterlockedFunction(long,_InterlockedOr,|,(volatile long * const value, const
long modify))
-PPC_MakeInterlockedFunction(char,_InterlockedXor8,^,(volatile char * const value, const
char modify))
-PPC_MakeInterlockedFunction(short,_InterlockedXor16,^,(volatile short * const value,
const short modify))
-PPC_MakeInterlockedFunction(long,_InterlockedXor,^,(volatile long * const value, const
long modify))
-
-PPC_QUAL unsigned char _interlockedbittestandset(volatile long * const a, const long b)
-{
- long x;
- long y;
- long mask = 1<<b;
-
- do
- {
- x = *a;
- y = _InterlockedCompareExchange(a, x | mask, x);
- }
- while(y != x);
-
- return (y & ~mask) != 0;
-}
-#endif
-
-PPC_QUAL long _InterlockedDecrement(volatile long * const lpAddend)
-{
- return _InterlockedExchangeAdd(lpAddend, -1) - 1;
-}
-
-PPC_QUAL long _InterlockedIncrement(volatile long * const lpAddend)
-{
- return _InterlockedExchangeAdd(lpAddend, 1) + 1;
-}
-
-/*** String operations ***/
-/* NOTE: we don't set a memory clobber in the __stosX functions because Visual C++
doesn't */
-/* Note that the PPC store multiple operations may raise an exception in LE
- * mode */
-PPC_QUAL void __stosb(unsigned char * Dest, const unsigned char Data, unsigned long
Count)
-{
- memset(Dest, Data, Count);
-}
-
-PPC_QUAL void __stosw(unsigned short * Dest, const unsigned short Data, unsigned long
Count)
-{
- while(Count--)
- *Dest++ = Data;
-}
-
-PPC_QUAL void __stosd(unsigned long * Dest, const unsigned long Data, unsigned long
Count)
-{
- while(Count--)
- *Dest++ = Data;
-}
-
-PPC_QUAL void __movsb(unsigned char * Destination, const unsigned char * Source, unsigned
long Count)
-{
- memcpy(Destination, Source, Count);
-}
-
-PPC_QUAL void __movsw(unsigned short * Destination, const unsigned short * Source,
unsigned long Count)
-{
- memcpy(Destination, Source, Count * sizeof(*Source));
-}
-
-PPC_QUAL void __movsd(unsigned long * Destination, const unsigned long * Source, unsigned
long Count)
-{
- memcpy(Destination, Source, Count * sizeof(*Source));
-}
-
-
-/*** FS segment addressing ***/
-/* On PowerPC, r13 points to TLS data, including the TEB at 0(r13) from what I
- * can tell */
-PPC_QUAL void __writefsbyte(const unsigned long Offset, const unsigned char Data)
-{
- char *addr;
- __asm__("\tadd %0,13,%1\n\tstb %2,0(%0)" : "=r" (addr) :
"r" (Offset), "r" (Data));
-}
-
-PPC_QUAL void __writefsword(const unsigned long Offset, const unsigned short Data)
-{
- char *addr;
- __asm__("\tadd %0,13,%1\n\tsth %2,0(%0)" : "=r" (addr) :
"r" (Offset), "r" (Data));
-}
-
-PPC_QUAL void __writefsdword(const unsigned long Offset, const unsigned long Data)
-{
- char *addr;
- __asm__("\tadd %0,13,%1\n\tstw %2,0(%0)" : "=r" (addr) :
"r" (Offset), "r" (Data));
-}
-
-PPC_QUAL unsigned char __readfsbyte(const unsigned long Offset)
-{
- unsigned short result;
- __asm__("\tadd 7,13,%1\n"
- "\tlbz %0,0(7)\n"
- : "=r" (result)
- : "r" (Offset)
- : "r7");
- return result;
-}
-
-PPC_QUAL unsigned short __readfsword(const unsigned long Offset)
-{
- unsigned short result;
- __asm__("\tadd 7,13,%1\n"
- "\tlhz %0,0(7)\n"
- : "=r" (result)
- : "r" (Offset)
- : "r7");
- return result;
-}
-
-PPC_QUAL unsigned long __readfsdword(const unsigned long Offset)
-{
- unsigned long result;
- __asm__("\tadd 7,13,%1\n"
- "\tlwz %0,0(7)\n"
- : "=r" (result)
- : "r" (Offset)
- : "r7");
- return result;
-}
-
-PPC_QUAL void __incfsbyte(const unsigned long Offset)
-{
- __writefsbyte(Offset, __readfsbyte(Offset)+1);
-}
-
-PPC_QUAL void __incfsword(const unsigned long Offset)
-{
- __writefsword(Offset, __readfsword(Offset)+1);
-}
-
-PPC_QUAL void __incfsdword(const unsigned long Offset)
-{
- __writefsdword(Offset, __readfsdword(Offset)+1);
-}
-
-/* NOTE: the bizarre implementation of __addfsxxx mimics the broken Visual C++ behavior
*/
-/* PPC Note: Not sure about the bizarre behavior. We'll try to emulate it later */
-PPC_QUAL void __addfsbyte(const unsigned long Offset, const unsigned char Data)
-{
- __writefsbyte(Offset, __readfsbyte(Offset) + Data);
-}
-
-PPC_QUAL void __addfsword(const unsigned long Offset, const unsigned short Data)
-{
- __writefsword(Offset, __readfsword(Offset) + Data);
-}
-
-PPC_QUAL void __addfsdword(const unsigned long Offset, const unsigned int Data)
-{
- __writefsdword(Offset, __readfsdword(Offset) + Data);
-}
-
-
-/*** Bit manipulation ***/
-PPC_QUAL unsigned char _BitScanForward(unsigned long * const Index, const unsigned long
Mask)
-{
- if(Mask == 0) return 0;
- else {
- unsigned long mask = Mask;
- mask &= -mask;
- *Index =
- ((mask & 0xffff0000) ? 16 : 0) +
- ((mask & 0xff00ff00) ? 8 : 0) +
- ((mask & 0xf0f0f0f0) ? 4 : 0) +
- ((mask & 0xcccccccc) ? 2 : 0) +
- ((mask & 0xaaaaaaaa) ? 1 : 0);
- return 1;
- }
-}
-
-/* Thanks http://www.jjj.de/bitwizardry/files/bithigh.h */
-PPC_QUAL unsigned char _BitScanReverse(unsigned long * const Index, const unsigned long
Mask)
-{
- unsigned long check = 16, checkmask;
- if(Mask == 0) return 0;
- else {
- unsigned long mask = Mask;
- *Index = 0;
- while(check) {
- checkmask = ((1<<check)-1) << check;
- if( mask & checkmask ) {
- mask >>= check;
- *Index += check;
- }
- check >>= 1;
- }
- return 1;
- }
-}
-
-/* NOTE: again, the bizarre implementation follows Visual C++ */
-PPC_QUAL unsigned char _bittest(const long * const a, const long b)
-{
- return ((*a) & (1<<b)) != 0;
-}
-
-PPC_QUAL unsigned char _bittestandcomplement(long * const a, const long b)
-{
- unsigned char ret = ((*a) & (1<<b)) != 0;
- (*a) ^= (1<<b);
- return ret;
-}
-
-PPC_QUAL unsigned char _bittestandreset(long * const a, const long b)
-{
- unsigned char ret = ((*a) & (1<<b)) != 0;
- (*a) &= ~(1<<b);
- return ret;
-}
-
-PPC_QUAL unsigned char _bittestandset(long * const a, const long b)
-{
- unsigned char ret = ((*a) & (1<<b)) != 0;
- (*a) |= (1<<b);
- return ret;
-}
-
-PPC_QUAL unsigned char _rotl8(const unsigned char value, const unsigned char shift)
-{
- return (value << shift) | (value >> (8-shift));
-}
-
-PPC_QUAL unsigned short _rotl16(const unsigned short value, const unsigned char shift)
-{
- return (value << shift) | (value >> (16-shift));
-}
-
-PPC_QUAL unsigned char _rotr8(const unsigned char value, const unsigned char shift)
-{
- return (value >> shift) | (value << (8-shift));
-}
-
-PPC_QUAL unsigned short _rotr16(const unsigned short value, const unsigned char shift)
-{
- return (value >> shift) | (value << (16-shift));
-}
-
-PPC_QUAL unsigned long long __ll_lshift(const unsigned long long Mask, int Bit)
-{
- return Mask << Bit;
-}
-
-PPC_QUAL long long __ll_rshift(const long long Mask, const int Bit)
-{
- return Mask >> Bit;
-}
-
-PPC_QUAL unsigned long long __ull_rshift(const unsigned long long Mask, int Bit)
-{
- return Mask >> Bit;
-}
-
-
-/*** 64-bit math ***/
-PPC_QUAL long long __emul(const int a, const int b)
-{
- return a * b;
-}
-
-PPC_QUAL unsigned long long __emulu(const unsigned int a, const unsigned int b)
-{
- return a * b;
-}
-
-
-/*** Port I/O ***/
-PPC_QUAL unsigned char __inbyte(const unsigned long Port)
-{
- int ret;
- __asm__(
- "mfmsr 5\n\t"
- "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */
- "mtmsr 6\n\t"
- "isync\n\t"
- "sync\n\t"
- "lbz %0,0(%1)\n\t" /* Get actual value at phys addr r3 */
- "mtmsr 5\n\t" : "=r" (ret) : "b" (Port)
- );
- return ret;
-}
-
-PPC_QUAL unsigned short __inword(const unsigned long Port)
-{
- int ret;
- __asm__(
- "mfmsr 5\n\t"
- "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */
- "mtmsr 6\n\t"
- "isync\n\t"
- "sync\n\t"
- "lhz %0,0(%1)\n\t" /* Get actual value at phys addr r3 */
- "mtmsr 5\n\t" : "=r" (ret) : "b" (Port)
- );
- return ret;
-}
-
-PPC_QUAL unsigned long __indword(const unsigned long Port)
-{
- int ret;
- __asm__(
- "mfmsr 5\n\t"
- "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */
- "mtmsr 6\n\t"
- "isync\n\t"
- "sync\n\t"
- "lwz %0,0(%1)\n\t" /* Get actual value at phys addr r3 */
- "mtmsr 5\n\t" : "=r" (ret) : "b" (Port)
- );
- return ret;
-}
-
-PPC_QUAL void __inbytestring(unsigned long Port, unsigned char * Buffer, unsigned long
Count)
-{
- while(Count--) {
- *Buffer++ = __inbyte(Port);
- }
-}
-
-PPC_QUAL void __inwordstring(unsigned long Port, unsigned short * Buffer, unsigned long
Count)
-{
- while(Count--) {
- *Buffer++ = __inword(Port);
- }
-}
-
-PPC_QUAL void __indwordstring(unsigned long Port, unsigned long * Buffer, unsigned long
Count)
-{
- while(Count--) {
- *Buffer++ = __indword(Port);
- }
-}
-
-PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
-{
- __asm__(
- "mfmsr 5\n\t"
- "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */
- "mtmsr 6\n\t"
- "sync\n\t"
- "eieio\n\t"
- "stb %1,0(%0)\n\t" /* Set actual value at phys addr r3 */
- "dcbst 0,%1\n\t"
- "mtmsr 5\n\t"
- "sync\n\t"
- "eieio\n\t" : : "b" (Port), "r" (Data)
- );
-}
-
-PPC_QUAL void __outword(unsigned long const Port, const unsigned short Data)
-{
- __asm__(
- "mfmsr 5\n\t"
- "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */
- "mtmsr 6\n\t"
- "sync\n\t"
- "eieio\n\t"
- "sth %1,0(%0)\n\t" /* Set actual value at phys addr r3 */
- "dcbst 0,%1\n\t"
- "mtmsr 5\n\t"
- "sync\n\t"
- "eieio\n\t" : : "b" (Port), "b" (Data)
- );
-}
-
-PPC_QUAL void __outdword(unsigned long const Port, const unsigned long Data)
-{
- __asm__(
- "mfmsr 5\n\t"
- "andi. 6,5,0xffef\n\t"/* turn off MSR[DR] */
- "mtmsr 6\n\t"
- "sync\n\t"
- "eieio\n\t"
- "stw %1,0(%0)\n\t" /* Set actual value at phys addr r3 */
- "dcbst 0,%1\n\t"
- "mtmsr 5\n\t"
- "sync\n\t"
- "eieio\n\t" : : "b" (Port), "b" (Data)
- );
-}
-
-PPC_QUAL void __outbytestring(unsigned long const Port, const unsigned char * const
Buffer, const unsigned long Count)
-{
- unsigned long count = Count;
- const unsigned char *buffer = Buffer;
- while(count--) {
- __outbyte(Port, *buffer++);
- }
-}
-
-PPC_QUAL void __outwordstring(unsigned long const Port, const unsigned short * const
Buffer, const unsigned long Count)
-{
- unsigned long count = Count;
- const unsigned short *buffer = Buffer;
- while(count--) {
- __outword(Port, *buffer++);
- }
-}
-
-PPC_QUAL void __outdwordstring(unsigned long const Port, const unsigned long * const
Buffer, const unsigned long Count)
-{
- unsigned long count = Count;
- const unsigned long *buffer = Buffer;
- while(count--) {
- __outdword(Port, *buffer++);
- }
-}
-
-
-/*** System information ***/
-PPC_QUAL void __cpuid(int CPUInfo[], const int InfoType)
-{
- unsigned long lo32;
- __asm__("mfpvr" : "=b" (lo32));
-}
-
-PPC_QUAL unsigned long long __rdtsc(void)
-{
- unsigned long lo32;
- __asm__("mfdec %0" : "=b" (lo32));
- return -lo32;
-}
-
-
-/*** Interrupts ***/
-/* Finally decided to do this by enabling single step trap */
-PPC_QUAL void __debugbreak(void)
-{
-
-}
-
-PPC_QUAL void __int2c(void)
-{
- /* Not sure yet */
-}
-
-#ifndef _ENABLE_DISABLE_DEFINED
-#define _ENABLE_DISABLE_DEFINED
-PPC_QUAL void _disable(void)
-{
- __asm__ __volatile__("mfmsr 0\n\t" \
- "li 8,0x7fff\n\t" \
- "and 0,8,0\n\t" \
- "mtmsr 0\n\t");
-}
-
-PPC_QUAL void _enable(void)
-{
- __asm__ __volatile__("mfmsr 8\n\t" \
- "ori 8,8,0x8000\n\t" \
- "mtmsr 8\n\t");
-}
-
-/*** Protected memory management ***/
-PPC_QUAL unsigned long __readsdr1(void)
-{
- unsigned long value;
- __asm__("mfsdr1 %0" : "=b" (value));
- return value;
-}
-
-PPC_QUAL void __writesdr1(const unsigned long long Data)
-{
- __asm__("mtsdr1 %0" : : "b" (Data));
-}
-
-/*** System operations ***/
-/* This likely has a different meaning from the X86 equivalent. We'll keep
- * the name cause it fits */
-PPC_QUAL unsigned long long __readmsr()
-{
- unsigned long temp;
- __asm__("mfmsr %0" : "=b" (temp));
- return temp;
-}
-
-PPC_QUAL void __writemsr(const unsigned long Value)
-{
- __asm__("mtmsr %0" : : "b" (Value));
-}
-
-/* We'll make sure of the following:
- * IO operations have completed
- * Write operations through cache have completed
- * We've reloaded anything in the data or instruction cache that might have
- * changed in real ram.
- */
-PPC_QUAL void __wbinvd(void)
-{
- __asm__("eieio\n\t"
- "dcs\n\t"
- "sync\n\t"
- "isync\n\t");
-}
-#endif
-
-PPC_QUAL long _InterlockedAddLargeStatistic(volatile long long * const Addend, const long
Value)
-{
-#if 0
- __asm__
- (
- "lock; add %[Value], %[Lo32];"
- "jae LABEL%=;"
- "lock; adc $0, %[Hi32];"
- "LABEL%=:;" :
- [Lo32] "=m" (*((volatile long *)(Addend) + 0)), [Hi32] "=m"
(*((volatile long *)(Addend) + 1)) :
- [Value] "ir" (Value)
- );
-#endif
- return Value;
-}
-
-/*** Miscellaneous ***/
-/* BUGBUG: only good for use in macros. Cannot be taken the address of */
-#define __noop(...) ((void)0)
-
-/* TODO: __assume. GCC only supports the weaker __builtin_expect */
-
-#endif
-/* EOF */
Removed: branches/the-real-msvc/include/psdk/intrin_x86.h
URL:
http://svn.reactos.org/svn/reactos/branches/the-real-msvc/include/psdk/intr…
==============================================================================
--- branches/the-real-msvc/include/psdk/intrin_x86.h [iso-8859-1] (original)
+++ branches/the-real-msvc/include/psdk/intrin_x86.h (removed)
@@ -1,1284 +1,0 @@
-/*
- Compatibility <intrin_x86.h> header for GCC -- GCC equivalents of intrinsic
- Microsoft Visual C++ functions. Originally developed for the ReactOS
- (<http://www.reactos.org/>) and TinyKrnl (<http://www.tinykrnl.org/>)
- projects.
-
- Copyright (c) 2006 KJK::Hyperion <hackbunny(a)reactos.com>
-
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the "Software"),
- to deal in the Software without restriction, including without limitation
- the rights to use, copy, modify, merge, publish, distribute, sublicense,
- and/or sell copies of the Software, and to permit persons to whom the
- Software is furnished to do so, subject to the following conditions:
-
- The above copyright notice and this permission notice shall be included in
- all copies or substantial portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- DEALINGS IN THE SOFTWARE.
-*/
-
-#ifndef KJK_INTRIN_X86_H_
-#define KJK_INTRIN_X86_H_
-
-/*
- FIXME: review all "memory" clobbers, add/remove to match Visual C++
- behavior: some "obvious" memory barriers are not present in the Visual C++
- implementation - e.g. __stosX; on the other hand, some memory barriers that
- *are* present could have been missed
-*/
-
-/*
- NOTE: this is a *compatibility* header. Some functions may look wrong at
- first, but they're only "as wrong" as they would be on Visual C++. Our
- priority is compatibility
-
- NOTE: unlike most people who write inline asm for GCC, I didn't pull the
- constraints and the uses of __volatile__ out of my... hat. Do not touch
- them. I hate cargo cult programming
-
- NOTE: be very careful with declaring "memory" clobbers. Some
"obvious"
- barriers aren't there in Visual C++ (e.g. __stosX)
-
- NOTE: review all intrinsics with a return value, add/remove __volatile__
- where necessary. If an intrinsic whose value is ignored generates a no-op
- under Visual C++, __volatile__ must be omitted; if it always generates code
- (for example, if it has side effects), __volatile__ must be specified. GCC
- will only optimize out non-volatile asm blocks with outputs, so input-only
- blocks are safe. Oddities such as the non-volatile 'rdmsr' are intentional
- and follow Visual C++ behavior
-
- NOTE: on GCC 4.1.0, please use the __sync_* built-ins for barriers and
- atomic operations. Test the version like this:
-
- #if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
- ...
-
- Pay attention to the type of barrier. Make it match with what Visual C++
- would use in the same case
-*/
-
-/*** Stack frame juggling ***/
-#define _ReturnAddress() (__builtin_return_address(0))
-#define _AddressOfReturnAddress() (&(((void **)(__builtin_frame_address(0)))[1]))
-/* TODO: __getcallerseflags but how??? */
-
-
-/*** Atomic operations ***/
-
-#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
-#define _ReadWriteBarrier() __sync_synchronize()
-#else
-static void __inline__ __attribute__((always_inline)) _MemoryBarrier(void)
-{
- __asm__ __volatile__("" : : : "memory");
-}
-#define _ReadWriteBarrier() _MemoryBarrier()
-#endif
-
-/* BUGBUG: GCC only supports full barriers */
-#define _ReadBarrier _ReadWriteBarrier
-#define _WriteBarrier _ReadWriteBarrier
-
-#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100
-
-static __inline__ __attribute__((always_inline)) char
_InterlockedCompareExchange8(volatile char * const Destination, const char Exchange, const
char Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-static __inline__ __attribute__((always_inline)) short
_InterlockedCompareExchange16(volatile short * const Destination, const short Exchange,
const short Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-static __inline__ __attribute__((always_inline)) long
_InterlockedCompareExchange(volatile long * const Destination, const long Exchange, const
long Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-static __inline__ __attribute__((always_inline)) void *
_InterlockedCompareExchangePointer(void * volatile * const Destination, void * const
Exchange, void * const Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedExchange(volatile long
* const Target, const long Value)
-{
- /* NOTE: __sync_lock_test_and_set would be an acquire barrier, so we force a full
barrier */
- __sync_synchronize();
- return __sync_lock_test_and_set(Target, Value);
-}
-
-#if defined(_M_AMD64)
-static __inline__ __attribute__((always_inline)) long long
_InterlockedExchange64(volatile long long * const Target, const long long Value)
-{
- /* NOTE: __sync_lock_test_and_set would be an acquire barrier, so we force a full
barrier */
- __sync_synchronize();
- return __sync_lock_test_and_set(Target, Value);
-}
-#endif
-
-static __inline__ __attribute__((always_inline)) void * _InterlockedExchangePointer(void
* volatile * const Target, void * const Value)
-{
- /* NOTE: ditto */
- __sync_synchronize();
- return __sync_lock_test_and_set(Target, Value);
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedExchangeAdd16(volatile
short * const Addend, const short Value)
-{
- return __sync_fetch_and_add(Addend, Value);
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedExchangeAdd(volatile
long * const Addend, const long Value)
-{
- return __sync_fetch_and_add(Addend, Value);
-}
-
-#if defined(_M_AMD64)
-static __inline__ __attribute__((always_inline)) long long
_InterlockedExchangeAdd64(volatile long long * const Addend, const long long Value)
-{
- return __sync_fetch_and_add(Addend, Value);
-}
-#endif
-
-static __inline__ __attribute__((always_inline)) char _InterlockedAnd8(volatile char *
const value, const char mask)
-{
- return __sync_fetch_and_and(value, mask);
-}
-
-static __inline__ __attribute__((always_inline)) short _InterlockedAnd16(volatile short *
const value, const short mask)
-{
- return __sync_fetch_and_and(value, mask);
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedAnd(volatile long *
const value, const long mask)
-{
- return __sync_fetch_and_and(value, mask);
-}
-
-#if defined(_M_AMD64)
-static __inline__ __attribute__((always_inline)) long _InterlockedAnd64(volatile long
long * const value, const long long mask)
-{
- return __sync_fetch_and_and(value, mask);
-}
-#endif
-
-static __inline__ __attribute__((always_inline)) char _InterlockedOr8(volatile char *
const value, const char mask)
-{
- return __sync_fetch_and_or(value, mask);
-}
-
-static __inline__ __attribute__((always_inline)) short _InterlockedOr16(volatile short *
const value, const short mask)
-{
- return __sync_fetch_and_or(value, mask);
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedOr(volatile long *
const value, const long mask)
-{
- return __sync_fetch_and_or(value, mask);
-}
-
-#if defined(_M_AMD64)
-static __inline__ __attribute__((always_inline)) long _InterlockedOr64(volatile long long
* const value, const long long mask)
-{
- return __sync_fetch_and_or(value, mask);
-}
-#endif
-
-static __inline__ __attribute__((always_inline)) char _InterlockedXor8(volatile char *
const value, const char mask)
-{
- return __sync_fetch_and_xor(value, mask);
-}
-
-static __inline__ __attribute__((always_inline)) short _InterlockedXor16(volatile short *
const value, const short mask)
-{
- return __sync_fetch_and_xor(value, mask);
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedXor(volatile long *
const value, const long mask)
-{
- return __sync_fetch_and_xor(value, mask);
-}
-
-#else
-
-static __inline__ __attribute__((always_inline)) char
_InterlockedCompareExchange8(volatile char * const Destination, const char Exchange, const
char Comperand)
-{
- char retval = Comperand;
- __asm__("lock; cmpxchgb %b[Exchange], %[Destination]" : [retval]
"+a" (retval) : [Destination] "m" (*Destination), [Exchange]
"q" (Exchange) : "memory");
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) short
_InterlockedCompareExchange16(volatile short * const Destination, const short Exchange,
const short Comperand)
-{
- short retval = Comperand;
- __asm__("lock; cmpxchgw %w[Exchange], %[Destination]" : [retval]
"+a" (retval) : [Destination] "m" (*Destination), [Exchange]
"q" (Exchange): "memory");
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) long
_InterlockedCompareExchange(volatile long * const Destination, const long Exchange, const
long Comperand)
-{
- long retval = Comperand;
- __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval]
"+a" (retval) : [Destination] "m" (*Destination), [Exchange]
"q" (Exchange): "memory");
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) void *
_InterlockedCompareExchangePointer(void * volatile * const Destination, void * const
Exchange, void * const Comperand)
-{
- void * retval = (void *)Comperand;
- __asm__("lock; cmpxchgl %k[Exchange], %[Destination]" : [retval]
"=a" (retval) : "[retval]" (retval), [Destination] "m"
(*Destination), [Exchange] "q" (Exchange) : "memory");
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedExchange(volatile long
* const Target, const long Value)
-{
- long retval = Value;
- __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) :
[Target] "m" (*Target) : "memory");
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) void * _InterlockedExchangePointer(void
* volatile * const Target, void * const Value)
-{
- void * retval = Value;
- __asm__("xchgl %[retval], %[Target]" : [retval] "+r" (retval) :
[Target] "m" (*Target) : "memory");
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedExchangeAdd16(volatile
short * const Addend, const short Value)
-{
- long retval = Value;
- __asm__("lock; xaddw %[retval], %[Addend]" : [retval] "+r" (retval)
: [Addend] "m" (*Addend) : "memory");
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedExchangeAdd(volatile
long * const Addend, const long Value)
-{
- long retval = Value;
- __asm__("lock; xaddl %[retval], %[Addend]" : [retval] "+r" (retval)
: [Addend] "m" (*Addend) : "memory");
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) char _InterlockedAnd8(volatile char *
const value, const char mask)
-{
- char x;
- char y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange8(value, x & mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) short _InterlockedAnd16(volatile short *
const value, const short mask)
-{
- short x;
- short y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange16(value, x & mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedAnd(volatile long *
const value, const long mask)
-{
- long x;
- long y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange(value, x & mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) char _InterlockedOr8(volatile char *
const value, const char mask)
-{
- char x;
- char y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange8(value, x | mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) short _InterlockedOr16(volatile short *
const value, const short mask)
-{
- short x;
- short y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange16(value, x | mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedOr(volatile long *
const value, const long mask)
-{
- long x;
- long y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange(value, x | mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) char _InterlockedXor8(volatile char *
const value, const char mask)
-{
- char x;
- char y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange8(value, x ^ mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) short _InterlockedXor16(volatile short *
const value, const short mask)
-{
- short x;
- short y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange16(value, x ^ mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedXor(volatile long *
const value, const long mask)
-{
- long x;
- long y;
-
- y = *value;
-
- do
- {
- x = y;
- y = _InterlockedCompareExchange(value, x ^ mask, x);
- }
- while(y != x);
-
- return y;
-}
-
-#endif
-
-#if (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) > 40100 &&
defined(__x86_64__)
-
-static __inline__ __attribute__((always_inline)) long long
_InterlockedCompareExchange64(volatile long long * const Destination, const long long
Exchange, const long long Comperand)
-{
- return __sync_val_compare_and_swap(Destination, Comperand, Exchange);
-}
-
-#else
-
-static __inline__ __attribute__((always_inline)) long long
_InterlockedCompareExchange64(volatile long long * const Destination, const long long
Exchange, const long long Comperand)
-{
- long long retval = Comperand;
-
- __asm__
- (
- "lock; cmpxchg8b %[Destination]" :
- [retval] "+A" (retval) :
- [Destination] "m" (*Destination),
- "b" ((unsigned long)((Exchange >> 0) & 0xFFFFFFFF)),
- "c" ((unsigned long)((Exchange >> 32) & 0xFFFFFFFF)) :
- "memory"
- );
-
- return retval;
-}
-
-#endif
-
-static __inline__ __attribute__((always_inline)) long
_InterlockedAddLargeStatistic(volatile long long * const Addend, const long Value)
-{
- __asm__
- (
- "lock; add %[Value], %[Lo32];"
- "jae LABEL%=;"
- "lock; adc $0, %[Hi32];"
- "LABEL%=:;" :
- [Lo32] "=m" (*((volatile long *)(Addend) + 0)), [Hi32] "=m"
(*((volatile long *)(Addend) + 1)) :
- [Value] "ir" (Value)
- );
-
- return Value;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedDecrement(volatile long
* const lpAddend)
-{
- return _InterlockedExchangeAdd(lpAddend, -1) - 1;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedIncrement(volatile long
* const lpAddend)
-{
- return _InterlockedExchangeAdd(lpAddend, 1) + 1;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedDecrement16(volatile
short * const lpAddend)
-{
- return _InterlockedExchangeAdd16(lpAddend, -1) - 1;
-}
-
-static __inline__ __attribute__((always_inline)) long _InterlockedIncrement16(volatile
short * const lpAddend)
-{
- return _InterlockedExchangeAdd16(lpAddend, 1) + 1;
-}
-
-#if defined(_M_AMD64)
-static __inline__ __attribute__((always_inline)) long long
_InterlockedDecrement64(volatile long long * const lpAddend)
-{
- return _InterlockedExchangeAdd64(lpAddend, -1) - 1;
-}
-
-static __inline__ __attribute__((always_inline)) long long
_InterlockedIncrement64(volatile long long * const lpAddend)
-{
- return _InterlockedExchangeAdd64(lpAddend, 1) + 1;
-}
-#endif
-
-static __inline__ __attribute__((always_inline)) unsigned char
_interlockedbittestandreset(volatile long * a, const long b)
-{
- unsigned char retval;
- __asm__("lock; btrl %[b], %[a]; setb %b[retval]" : [retval] "=r"
(retval), [a] "=m" (*a) : [b] "Ir" (b) : "memory");
- return retval;
-}
-
-#if defined(_M_AMD64)
-static __inline__ __attribute__((always_inline)) unsigned char
_interlockedbittestandreset64(volatile long long * a, const long long b)
-{
- unsigned char retval;
- __asm__("lock; btrq %[b], %[a]; setb %b[retval]" : [retval] "=r"
(retval), [a] "=m" (*a) : [b] "Ir" (b) : "memory");
- return retval;
-}
-#endif
-
-static __inline__ __attribute__((always_inline)) unsigned char
_interlockedbittestandset(volatile long * a, const long b)
-{
- unsigned char retval;
- __asm__("lock; btsl %[b], %[a]; setc %b[retval]" : [retval] "=r"
(retval), [a] "=m" (*a) : [b] "Ir" (b) : "memory");
- return retval;
-}
-
-#if defined(_M_AMD64)
-static __inline__ __attribute__((always_inline)) unsigned char
_interlockedbittestandset64(volatile long long * a, const long long b)
-{
- unsigned char retval;
- __asm__("lock; btsq %[b], %[a]; setc %b[retval]" : [retval] "=r"
(retval), [a] "=m" (*a) : [b] "Ir" (b) : "memory");
- return retval;
-}
-#endif
-
-/*** String operations ***/
-/* NOTE: we don't set a memory clobber in the __stosX functions because Visual C++
doesn't */
-static __inline__ __attribute__((always_inline)) void __stosb(unsigned char * Dest, const
unsigned char Data, size_t Count)
-{
- __asm__ __volatile__
- (
- "rep; stosb" :
- [Dest] "=D" (Dest), [Count] "=c" (Count) :
- "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
- );
-}
-
-static __inline__ __attribute__((always_inline)) void __stosw(unsigned short * Dest,
const unsigned short Data, size_t Count)
-{
- __asm__ __volatile__
- (
- "rep; stosw" :
- [Dest] "=D" (Dest), [Count] "=c" (Count) :
- "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
- );
-}
-
-static __inline__ __attribute__((always_inline)) void __stosd(unsigned long * Dest, const
unsigned long Data, size_t Count)
-{
- __asm__ __volatile__
- (
- "rep; stosl" :
- [Dest] "=D" (Dest), [Count] "=c" (Count) :
- "[Dest]" (Dest), "a" (Data), "[Count]" (Count)
- );
-}
-
-static __inline__ __attribute__((always_inline)) void __movsb(unsigned char *
Destination, const unsigned char * Source, size_t Count)
-{
- __asm__ __volatile__
- (
- "rep; movsb" :
- [Destination] "=D" (Destination), [Source] "=S" (Source), [Count]
"=c" (Count) :
- "[Destination]" (Destination), "[Source]" (Source),
"[Count]" (Count)
- );
-}
-
-static __inline__ __attribute__((always_inline)) void __movsw(unsigned short *
Destination, const unsigned short * Source, size_t Count)
-{
- __asm__ __volatile__
- (
- "rep; movsw" :
- [Destination] "=D" (Destination), [Source] "=S" (Source), [Count]
"=c" (Count) :
- "[Destination]" (Destination), "[Source]" (Source),
"[Count]" (Count)
- );
-}
-
-static __inline__ __attribute__((always_inline)) void __movsd(unsigned long *
Destination, const unsigned long * Source, size_t Count)
-{
- __asm__ __volatile__
- (
- "rep; movsd" :
- [Destination] "=D" (Destination), [Source] "=S" (Source), [Count]
"=c" (Count) :
- "[Destination]" (Destination), "[Source]" (Source),
"[Count]" (Count)
- );
-}
-
-#if defined(_M_AMD64)
-/*** GS segment addressing ***/
-
-static __inline__ __attribute__((always_inline)) void __writegsbyte(const unsigned long
Offset, const unsigned char Data)
-{
- __asm__ __volatile__("movb %b[Data], %%gs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __writegsword(const unsigned long
Offset, const unsigned short Data)
-{
- __asm__ __volatile__("movw %w[Data], %%gs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __writegsdword(const unsigned long
Offset, const unsigned long Data)
-{
- __asm__ __volatile__("movl %k[Data], %%gs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __writegsqword(const unsigned long
Offset, const unsigned __int64 Data)
-{
- __asm__ __volatile__("movq %q[Data], %%gs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) unsigned char __readgsbyte(const
unsigned long Offset)
-{
- unsigned char value;
- __asm__ __volatile__("movb %%gs:%a[Offset], %b[value]" : [value]
"=q" (value) : [Offset] "irm" (Offset));
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned short __readgsword(const
unsigned long Offset)
-{
- unsigned short value;
- __asm__ __volatile__("movw %%gs:%a[Offset], %w[value]" : [value]
"=q" (value) : [Offset] "irm" (Offset));
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned long __readgsdword(const
unsigned long Offset)
-{
- unsigned long value;
- __asm__ __volatile__("movl %%gs:%a[Offset], %k[value]" : [value]
"=q" (value) : [Offset] "irm" (Offset));
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned __int64 __readgsqword(const
unsigned long Offset)
-{
- unsigned __int64 value;
- __asm__ __volatile__("movq %%gs:%a[Offset], %q[value]" : [value]
"=q" (value) : [Offset] "irm" (Offset));
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) void __incgsbyte(const unsigned long
Offset)
-{
- __asm__ __volatile__("incb %%gs:%a[Offset]" : : [Offset] "ir"
(Offset) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __incgsword(const unsigned long
Offset)
-{
- __asm__ __volatile__("incw %%gs:%a[Offset]" : : [Offset] "ir"
(Offset) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __incgsdword(const unsigned long
Offset)
-{
- __asm__ __volatile__("incl %%gs:%a[Offset]" : : [Offset] "ir"
(Offset) : "memory");
-}
-
-/* NOTE: the bizarre implementation of __addgsxxx mimics the broken Visual C++ behavior
*/
-static __inline__ __attribute__((always_inline)) void __addgsbyte(const unsigned long
Offset, const unsigned char Data)
-{
- if(!__builtin_constant_p(Offset))
- __asm__ __volatile__("addb %k[Offset], %%gs:%a[Offset]" : : [Offset]
"r" (Offset) : "memory");
- else
- __asm__ __volatile__("addb %b[Data], %%gs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __addgsword(const unsigned long
Offset, const unsigned short Data)
-{
- if(!__builtin_constant_p(Offset))
- __asm__ __volatile__("addw %k[Offset], %%gs:%a[Offset]" : : [Offset]
"r" (Offset) : "memory");
- else
- __asm__ __volatile__("addw %w[Data], %%gs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __addgsdword(const unsigned long
Offset, const unsigned int Data)
-{
- if(!__builtin_constant_p(Offset))
- __asm__ __volatile__("addl %k[Offset], %%gs:%a[Offset]" : : [Offset]
"r" (Offset) : "memory");
- else
- __asm__ __volatile__("addl %k[Data], %%gs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-#else
-/*** FS segment addressing ***/
-static __inline__ __attribute__((always_inline)) void __writefsbyte(const unsigned long
Offset, const unsigned char Data)
-{
- __asm__ __volatile__("movb %b[Data], %%fs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __writefsword(const unsigned long
Offset, const unsigned short Data)
-{
- __asm__ __volatile__("movw %w[Data], %%fs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __writefsdword(const unsigned long
Offset, const unsigned long Data)
-{
- __asm__ __volatile__("movl %k[Data], %%fs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) unsigned char __readfsbyte(const
unsigned long Offset)
-{
- unsigned char value;
- __asm__ __volatile__("movb %%fs:%a[Offset], %b[value]" : [value]
"=q" (value) : [Offset] "irm" (Offset) : "memory");
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned short __readfsword(const
unsigned long Offset)
-{
- unsigned short value;
- __asm__ __volatile__("movw %%fs:%a[Offset], %w[value]" : [value]
"=q" (value) : [Offset] "irm" (Offset));
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned long __readfsdword(const
unsigned long Offset)
-{
- unsigned long value;
- __asm__ __volatile__("movl %%fs:%a[Offset], %k[value]" : [value]
"=q" (value) : [Offset] "irm" (Offset));
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) void __incfsbyte(const unsigned long
Offset)
-{
- __asm__ __volatile__("incb %%fs:%a[Offset]" : : [Offset] "ir"
(Offset) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __incfsword(const unsigned long
Offset)
-{
- __asm__ __volatile__("incw %%fs:%a[Offset]" : : [Offset] "ir"
(Offset) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __incfsdword(const unsigned long
Offset)
-{
- __asm__ __volatile__("incl %%fs:%a[Offset]" : : [Offset] "ir"
(Offset) : "memory");
-}
-
-/* NOTE: the bizarre implementation of __addfsxxx mimics the broken Visual C++ behavior
*/
-static __inline__ __attribute__((always_inline)) void __addfsbyte(const unsigned long
Offset, const unsigned char Data)
-{
- if(!__builtin_constant_p(Offset))
- __asm__ __volatile__("addb %k[Offset], %%fs:%a[Offset]" : : [Offset]
"r" (Offset) : "memory");
- else
- __asm__ __volatile__("addb %b[Data], %%fs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __addfsword(const unsigned long
Offset, const unsigned short Data)
-{
- if(!__builtin_constant_p(Offset))
- __asm__ __volatile__("addw %k[Offset], %%fs:%a[Offset]" : : [Offset]
"r" (Offset) : "memory");
- else
- __asm__ __volatile__("addw %w[Data], %%fs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __addfsdword(const unsigned long
Offset, const unsigned int Data)
-{
- if(!__builtin_constant_p(Offset))
- __asm__ __volatile__("addl %k[Offset], %%fs:%a[Offset]" : : [Offset]
"r" (Offset) : "memory");
- else
- __asm__ __volatile__("addl %k[Data], %%fs:%a[Offset]" : : [Offset]
"ir" (Offset), [Data] "iq" (Data) : "memory");
-}
-#endif
-
-
-/*** Bit manipulation ***/
-static __inline__ __attribute__((always_inline)) unsigned char _BitScanForward(unsigned
long * const Index, const unsigned long Mask)
-{
- __asm__("bsfl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask]
"mr" (Mask));
- return Mask ? 1 : 0;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned char _BitScanReverse(unsigned
long * const Index, const unsigned long Mask)
-{
- __asm__("bsrl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask]
"mr" (Mask));
- return Mask ? 1 : 0;
-}
-
-/* NOTE: again, the bizarre implementation follows Visual C++ */
-static __inline__ __attribute__((always_inline)) unsigned char _bittest(const long *
const a, const long b)
-{
- unsigned char retval;
-
- if(__builtin_constant_p(b))
- __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) :
[a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
- else
- __asm__("bt %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval) :
[a] "mr" (*a), [b] "r" (b));
-
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned char _bittestandcomplement(long
* const a, const long b)
-{
- unsigned char retval;
-
- if(__builtin_constant_p(b))
- __asm__("btc %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval)
: [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
- else
- __asm__("btc %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval)
: [a] "mr" (*a), [b] "r" (b));
-
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned char _bittestandreset(long *
const a, const long b)
-{
- unsigned char retval;
-
- if(__builtin_constant_p(b))
- __asm__("btr %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval)
: [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
- else
- __asm__("btr %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval)
: [a] "mr" (*a), [b] "r" (b));
-
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned char _bittestandset(long *
const a, const long b)
-{
- unsigned char retval;
-
- if(__builtin_constant_p(b))
- __asm__("bts %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval)
: [a] "mr" (*(a + (b / 32))), [b] "Ir" (b % 32));
- else
- __asm__("bts %[b], %[a]; setb %b[retval]" : [retval] "=q" (retval)
: [a] "mr" (*a), [b] "r" (b));
-
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned char _rotl8(const unsigned char
value, const unsigned char shift)
-{
- unsigned char retval;
- __asm__("rolb %b[shift], %b[retval]" : [retval] "=rm" (retval) :
"[retval]" (value), [shift] "Nc" (shift));
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned short _rotl16(const unsigned
short value, const unsigned char shift)
-{
- unsigned short retval;
- __asm__("rolw %b[shift], %w[retval]" : [retval] "=rm" (retval) :
"[retval]" (value), [shift] "Nc" (shift));
- return retval;
-}
-
-#ifndef __MSVCRT__
-static __inline__ __attribute__((always_inline)) unsigned int _rotl(const unsigned int
value, const int shift)
-{
- unsigned long retval;
- __asm__("roll %b[shift], %k[retval]" : [retval] "=rm" (retval) :
"[retval]" (value), [shift] "Nc" (shift));
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned long _rotr(const unsigned int
value, const unsigned char shift)
-{
- unsigned long retval;
- __asm__("rorl %b[shift], %k[retval]" : [retval] "=rm" (retval) :
"[retval]" (value), [shift] "Nc" (shift));
- return retval;
-}
-#endif
-
-static __inline__ __attribute__((always_inline)) unsigned char _rotr8(const unsigned char
value, const unsigned char shift)
-{
- unsigned char retval;
- __asm__("rorb %b[shift], %b[retval]" : [retval] "=rm" (retval) :
"[retval]" (value), [shift] "Nc" (shift));
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned short _rotr16(const unsigned
short value, const unsigned char shift)
-{
- unsigned short retval;
- __asm__("rorw %b[shift], %w[retval]" : [retval] "=rm" (retval) :
"[retval]" (value), [shift] "Nc" (shift));
- return retval;
-}
-
-/*
- NOTE: in __ll_lshift, __ll_rshift and __ull_rshift we use the "A"
- constraint (edx:eax) for the Mask argument, because it's the only way GCC
- can pass 64-bit operands around - passing the two 32 bit parts separately
- just confuses it. Also we declare Bit as an int and then truncate it to
- match Visual C++ behavior
-*/
-static __inline__ __attribute__((always_inline)) unsigned long long __ll_lshift(const
unsigned long long Mask, const int Bit)
-{
- unsigned long long retval = Mask;
-
- __asm__
- (
- "shldl %b[Bit], %%eax, %%edx; sall %b[Bit], %%eax" :
- "+A" (retval) :
- [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
- );
-
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) long long __ll_rshift(const long long
Mask, const int Bit)
-{
- unsigned long long retval = Mask;
-
- __asm__
- (
- "shldl %b[Bit], %%eax, %%edx; sarl %b[Bit], %%eax" :
- "+A" (retval) :
- [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
- );
-
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned long long __ull_rshift(const
unsigned long long Mask, int Bit)
-{
- unsigned long long retval = Mask;
-
- __asm__
- (
- "shrdl %b[Bit], %%eax, %%edx; shrl %b[Bit], %%eax" :
- "+A" (retval) :
- [Bit] "Nc" ((unsigned char)((unsigned long)Bit) & 0xFF)
- );
-
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned short _byteswap_ushort(unsigned
short value)
-{
- unsigned short retval;
- __asm__("rorw $8, %w[retval]" : [retval] "=rm" (retval) :
"[retval]" (value));
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned long _byteswap_ulong(unsigned
long value)
-{
- unsigned long retval;
- __asm__("bswapl %[retval]" : [retval] "=rm" (retval) :
"[retval]" (value));
- return retval;
-}
-
-#ifdef _M_AMD64
-static __inline__ __attribute__((always_inline)) unsigned __int64
_byteswap_uint64(unsigned __int64 value)
-{
- unsigned __int64 retval;
- __asm__("bswapq %[retval]" : [retval] "=rm" (retval) :
"[retval]" (value));
- return retval;
-}
-#else
-static __inline__ __attribute__((always_inline)) unsigned __int64
_byteswap_uint64(unsigned __int64 value)
-{
- union {
- __int64 int64part;
- struct {
- unsigned long lowpart;
- unsigned long hipart;
- };
- } retval;
- retval.int64part = value;
- __asm__("bswapl %[lowpart]\n"
- "bswapl %[hipart]\n"
- : [lowpart] "=rm" (retval.hipart), [hipart] "=rm"
(retval.lowpart) : "[lowpart]" (retval.lowpart), "[hipart]"
(retval.hipart) );
- return retval.int64part;
-}
-#endif
-
-/*** 64-bit math ***/
-static __inline__ __attribute__((always_inline)) long long __emul(const int a, const int
b)
-{
- long long retval;
- __asm__("imull %[b]" : "=A" (retval) : [a] "a" (a), [b]
"rm" (b));
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned long long __emulu(const
unsigned int a, const unsigned int b)
-{
- unsigned long long retval;
- __asm__("mull %[b]" : "=A" (retval) : [a] "a" (a), [b]
"rm" (b));
- return retval;
-}
-
-
-/*** Port I/O ***/
-static __inline__ __attribute__((always_inline)) unsigned char __inbyte(const unsigned
short Port)
-{
- unsigned char byte;
- __asm__ __volatile__("inb %w[Port], %b[byte]" : [byte] "=a" (byte) :
[Port] "Nd" (Port));
- return byte;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned short __inword(const unsigned
short Port)
-{
- unsigned short word;
- __asm__ __volatile__("inw %w[Port], %w[word]" : [word] "=a" (word) :
[Port] "Nd" (Port));
- return word;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned long __indword(const unsigned
short Port)
-{
- unsigned long dword;
- __asm__ __volatile__("inl %w[Port], %k[dword]" : [dword] "=a"
(dword) : [Port] "Nd" (Port));
- return dword;
-}
-
-static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned short Port,
unsigned char * Buffer, unsigned long Count)
-{
- __asm__ __volatile__
- (
- "rep; insb" :
- [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
- "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
- "memory"
- );
-}
-
-static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned short Port,
unsigned short * Buffer, unsigned long Count)
-{
- __asm__ __volatile__
- (
- "rep; insw" :
- [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
- "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
- "memory"
- );
-}
-
-static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned short
Port, unsigned long * Buffer, unsigned long Count)
-{
- __asm__ __volatile__
- (
- "rep; insl" :
- [Buffer] "=D" (Buffer), [Count] "=c" (Count) :
- "d" (Port), "[Buffer]" (Buffer), "[Count]" (Count) :
- "memory"
- );
-}
-
-static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short const
Port, const unsigned char Data)
-{
- __asm__ __volatile__("outb %b[Data], %w[Port]" : : [Port] "Nd"
(Port), [Data] "a" (Data));
-}
-
-static __inline__ __attribute__((always_inline)) void __outword(unsigned short const
Port, const unsigned short Data)
-{
- __asm__ __volatile__("outw %w[Data], %w[Port]" : : [Port] "Nd"
(Port), [Data] "a" (Data));
-}
-
-static __inline__ __attribute__((always_inline)) void __outdword(unsigned short const
Port, const unsigned long Data)
-{
- __asm__ __volatile__("outl %k[Data], %w[Port]" : : [Port] "Nd"
(Port), [Data] "a" (Data));
-}
-
-static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned short
const Port, const unsigned char * const Buffer, const unsigned long Count)
-{
- __asm__ __volatile__("rep; outsb" : : [Port] "d" (Port), [Buffer]
"S" (Buffer), "c" (Count));
-}
-
-static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned short
const Port, const unsigned short * const Buffer, const unsigned long Count)
-{
- __asm__ __volatile__("rep; outsw" : : [Port] "d" (Port), [Buffer]
"S" (Buffer), "c" (Count));
-}
-
-static __inline__ __attribute__((always_inline)) void __outdwordstring(unsigned short
const Port, const unsigned long * const Buffer, const unsigned long Count)
-{
- __asm__ __volatile__("rep; outsl" : : [Port] "d" (Port), [Buffer]
"S" (Buffer), "c" (Count));
-}
-
-
-/*** System information ***/
-static __inline__ __attribute__((always_inline)) void __cpuid(int CPUInfo[], const int
InfoType)
-{
- __asm__ __volatile__("cpuid" : "=a" (CPUInfo[0]), "=b"
(CPUInfo[1]), "=c" (CPUInfo[2]), "=d" (CPUInfo[3]) : "a"
(InfoType));
-}
-
-static __inline__ __attribute__((always_inline)) unsigned long long __rdtsc(void)
-{
- unsigned long long retval;
- __asm__ __volatile__("rdtsc" : "=A"(retval));
- return retval;
-}
-
-
-/*** Interrupts ***/
-static __inline__ __attribute__((always_inline)) void __debugbreak(void)
-{
- __asm__("int $3");
-}
-
-static __inline__ __attribute__((always_inline)) void __int2c(void)
-{
- __asm__("int $0x2c");
-}
-
-static __inline__ __attribute__((always_inline)) void _disable(void)
-{
- __asm__("cli");
-}
-
-static __inline__ __attribute__((always_inline)) void _enable(void)
-{
- __asm__("sti");
-}
-
-
-/*** Protected memory management ***/
-
-static __inline__ __attribute__((always_inline)) void __writecr0(const unsigned __int64
Data)
-{
- __asm__("mov %[Data], %%cr0" : : [Data] "q" (Data) :
"memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __writecr3(const unsigned __int64
Data)
-{
- __asm__("mov %[Data], %%cr3" : : [Data] "q" (Data) :
"memory");
-}
-
-static __inline__ __attribute__((always_inline)) void __writecr4(const unsigned __int64
Data)
-{
- __asm__("mov %[Data], %%cr4" : : [Data] "q" (Data) :
"memory");
-}
-
-#ifdef _M_AMD64
-static __inline__ __attribute__((always_inline)) void __writecr8(const unsigned __int64
Data)
-{
- __asm__("mov %[Data], %%cr8" : : [Data] "q" (Data) :
"memory");
-}
-#endif
-
-static __inline__ __attribute__((always_inline)) unsigned __int64 __readcr0(void)
-{
- unsigned __int64 value;
- __asm__ __volatile__("mov %%cr0, %[value]" : [value] "=q" (value));
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned __int64 __readcr2(void)
-{
- unsigned __int64 value;
- __asm__ __volatile__("mov %%cr2, %[value]" : [value] "=q" (value));
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned __int64 __readcr3(void)
-{
- unsigned __int64 value;
- __asm__ __volatile__("mov %%cr3, %[value]" : [value] "=q" (value));
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) unsigned __int64 __readcr4(void)
-{
- unsigned __int64 value;
- __asm__ __volatile__("mov %%cr4, %[value]" : [value] "=q" (value));
- return value;
-}
-
-#ifdef _M_AMD64
-static __inline__ __attribute__((always_inline)) unsigned __int64 __readcr8(void)
-{
- unsigned __int64 value;
- __asm__ __volatile__("movq %%cr8, %q[value]" : [value] "=q"
(value));
- return value;
-}
-#endif
-
-#ifdef _M_AMD64
-static __inline__ __attribute__((always_inline)) unsigned __int64 __readdr(unsigned int
reg)
-{
- unsigned __int64 value;
- switch (reg)
- {
- case 0:
- __asm__ __volatile__("movq %%dr0, %q[value]" : [value] "=q"
(value));
- break;
- case 1:
- __asm__ __volatile__("movq %%dr1, %q[value]" : [value] "=q"
(value));
- break;
- case 2:
- __asm__ __volatile__("movq %%dr2, %q[value]" : [value] "=q"
(value));
- break;
- case 3:
- __asm__ __volatile__("movq %%dr3, %q[value]" : [value] "=q"
(value));
- break;
- case 4:
- __asm__ __volatile__("movq %%dr4, %q[value]" : [value] "=q"
(value));
- break;
- case 5:
- __asm__ __volatile__("movq %%dr5, %q[value]" : [value] "=q"
(value));
- break;
- case 6:
- __asm__ __volatile__("movq %%dr6, %q[value]" : [value] "=q"
(value));
- break;
- case 7:
- __asm__ __volatile__("movq %%dr7, %q[value]" : [value] "=q"
(value));
- break;
- }
- return value;
-}
-
-static __inline__ __attribute__((always_inline)) void __writedr(unsigned reg, unsigned
__int64 value)
-{
- switch (reg)
- {
- case 0:
- __asm__("movq %q[value], %%dr0" : : [value] "q" (value) :
"memory");
- break;
- case 1:
- __asm__("movq %q[value], %%dr1" : : [value] "q" (value) :
"memory");
- break;
- case 2:
- __asm__("movq %q[value], %%dr2" : : [value] "q" (value) :
"memory");
- break;
- case 3:
- __asm__("movq %q[value], %%dr3" : : [value] "q" (value) :
"memory");
- break;
- case 4:
- __asm__("movq %q[value], %%dr4" : : [value] "q" (value) :
"memory");
- break;
- case 5:
- __asm__("movq %q[value], %%dr5" : : [value] "q" (value) :
"memory");
- break;
- case 6:
- __asm__("movq %q[value], %%dr6" : : [value] "q" (value) :
"memory");
- break;
- case 7:
- __asm__("movq %q[value], %%dr7" : : [value] "q" (value) :
"memory");
- break;
- }
-}
-#endif
-
-static __inline__ __attribute__((always_inline)) void __invlpg(void * const Address)
-{
- __asm__("invlpg %[Address]" : : [Address] "m" (*((unsigned char
*)(Address))));
-}
-
-
-/*** System operations ***/
-static __inline__ __attribute__((always_inline)) unsigned long long __readmsr(const int
reg)
-{
-#ifdef _M_AMD64
- unsigned long low, high;
- __asm__ __volatile__("rdmsr" : "=a" (low), "=d" (high) :
"c" (reg));
- return (high << 32) | low;
-#else
- unsigned long long retval;
- __asm__ __volatile__("rdmsr" : "=A" (retval) : "c"
(reg));
- return retval;
-#endif
-}
-
-static __inline__ __attribute__((always_inline)) void __writemsr(const unsigned long
Register, const unsigned long long Value)
-{
-#ifdef _M_AMD64
- __asm__ __volatile__("wrmsr" : : "a" (Value), "d" (Value
>> 32), "c" (Register));
-#else
- __asm__ __volatile__("wrmsr" : : "A" (Value), "c"
(Register));
-#endif
-}
-
-static __inline__ __attribute__((always_inline)) unsigned long long __readpmc(const int
counter)
-{
- unsigned long long retval;
- __asm__ __volatile__("rdpmc" : "=A" (retval) : "c"
(counter));
- return retval;
-}
-
-/* NOTE: an immediate value for 'a' will raise an ICE in Visual C++ */
-static __inline__ __attribute__((always_inline)) unsigned long __segmentlimit(const
unsigned long a)
-{
- unsigned long retval;
- __asm__ __volatile__("lsl %[a], %[retval]" : [retval] "=r" (retval)
: [a] "rm" (a));
- return retval;
-}
-
-static __inline__ __attribute__((always_inline)) void __wbinvd(void)
-{
- __asm__ __volatile__("wbinvd");
-}
-
-static __inline__ __attribute__((always_inline)) void __lidt(void *Source)
-{
- __asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
-}
-
-static __inline__ __attribute__((always_inline)) void __sidt(void *Destination)
-{
- __asm__ __volatile__("sidt %0" : : "m"(*(short*)Destination) :
"memory");
-}
-
-#endif /* KJK_INTRIN_X86_H_ */
-
-/* EOF */
Removed: branches/the-real-msvc/include/psdk/intrin_x86_64.h
URL:
http://svn.reactos.org/svn/reactos/branches/the-real-msvc/include/psdk/intr…
==============================================================================
--- branches/the-real-msvc/include/psdk/intrin_x86_64.h [iso-8859-1] (original)
+++ branches/the-real-msvc/include/psdk/intrin_x86_64.h (removed)
@@ -1,1 +1,0 @@
-
Modified: branches/the-real-msvc/tools/rbuild/backend/mingw/mingw.cpp
URL:
http://svn.reactos.org/svn/reactos/branches/the-real-msvc/tools/rbuild/back…
==============================================================================
--- branches/the-real-msvc/tools/rbuild/backend/mingw/mingw.cpp [iso-8859-1] (original)
+++ branches/the-real-msvc/tools/rbuild/backend/mingw/mingw.cpp [iso-8859-1] Wed Oct 29
08:43:31 2008
@@ -497,7 +497,7 @@
fprintf ( fMakefile, "PROJECT_LFLAGS := '$(shell ${TARGET_CC}
-print-libgcc-file-name)' %s\n", GenerateProjectLFLAGS ().c_str () );
fprintf ( fMakefile, "PROJECT_LPPFLAGS := '$(shell ${TARGET_CPP}
-print-file-name=libstdc++.a)' '$(shell ${TARGET_CPP}
-print-file-name=libgcc.a)' '$(shell ${TARGET_CPP}
-print-file-name=libmingw32.a)' '$(shell ${TARGET_CPP}
-print-file-name=libmingwex.a)'\n" );
//~ fprintf ( fMakefile, "PROJECT_CFLAGS += -Wall\n" );
- fprintf ( fMakefile, "PROJECT_CFLAGS += -Wall -W4 -wd4820 -wd4214 -wd4201 -wd4668
-wd4255 -wd4005 -wd4127 -wd4710 -wd4711 -wd4100 -wd4738 -wd4706\n" );
+ fprintf ( fMakefile, "PROJECT_CFLAGS += -Wall -W4 -wd4820 -wd4214 -wd4201 -wd4668
-wd4255 -wd4005 -wd4127 -wd4710 -wd4711 -wd4100 -wd4738 -wd4706 -wd4245 -wd4242 -wd4244
-wd4152 -wd4717 -wd4273 -wd4018 -wd4204 -wd4054 -wd4055 -wd4514\n" );
//~ fprintf ( fMakefile, "ifneq ($(OARCH),)\n" );
//~ fprintf ( fMakefile, "PROJECT_CFLAGS += -march=$(OARCH)\n" );
//~ fprintf ( fMakefile, "endif\n" );
Modified: branches/the-real-msvc/tools/rbuild/backend/mingw/modulehandler.cpp
URL:
http://svn.reactos.org/svn/reactos/branches/the-real-msvc/tools/rbuild/back…
==============================================================================
--- branches/the-real-msvc/tools/rbuild/backend/mingw/modulehandler.cpp [iso-8859-1]
(original)
+++ branches/the-real-msvc/tools/rbuild/backend/mingw/modulehandler.cpp [iso-8859-1] Wed
Oct 29 08:43:31 2008
@@ -1904,8 +1904,8 @@
if ( !module.allowWarnings )
globalCflags += " -WX";
- globalCflags += " -Zl -MD";
- globalCflags += " -D__MSVCRT__ -D__MINGW_IMPORT=__declspec(dllimport)";
+ globalCflags += " -X -Zl -MT";
+ globalCflags += " -D__MSVCRT__ -D__MINGW_IMPORT=__declspec(dllimport)
-Dinline=__inline";
globalCflags += " -D_CRT_SECURE_NO_WARNINGS";
globalCflags += " -D_CRT_NON_CONFORMING_SWPRINTFS";
}