[ros-diffs] [cgutman] 55450: [USBEHCI] - Implement ResetController and call it before setting up the controller - Don't disable 64-bit addressing until the BIOS gives up control of the controller - Comment out...

Author: cgutman
Date: Mon Feb  6 07:41:20 2012
New Revision: 55450

URL: http://svn.reactos.org/svn/reactos?rev=55450&view=rev
Log:
[USBEHCI]
- Implement ResetController and call it before setting up the controller
- Don't disable 64-bit addressing until the BIOS gives up control of the controller
- Comment out manually clearing the SMI interrupt and the BIOS owned flag by request of
janderwald
- EHCI no longer hangs for me on real hardware during controller initialization

Modified:
    branches/usb-bringup-trunk/drivers/usb/usbehci_new/hardware.cpp

Modified: branches/usb-bringup-trunk/drivers/usb/usbehci_new/hardware.cpp
URL:
http://svn.reactos.org/svn/reactos/branches/usb-bringup-trunk/drivers/usb/u…
==============================================================================
--- branches/usb-bringup-trunk/drivers/usb/usbehci_new/hardware.cpp [iso-8859-1]
(original)
+++ branches/usb-bringup-trunk/drivers/usb/usbehci_new/hardware.cpp [iso-8859-1] Mon Feb 
6 07:41:20 2012
@@ -567,17 +567,6 @@
     LARGE_INTEGER Timeout;
 
     //
-    // check caps
-    //
-    if (m_Capabilities.HCCParams.CurAddrBits)
-    {
-        //
-        // disable 64-bit addressing
-        //
-        EHCI_WRITE_REGISTER_ULONG(EHCI_CTRLDSSEGMENT, 0x0);
-    }
-
-    //
     // are extended caps supported
     //
     ExtendedCapsSupport = (m_Capabilities.HCCParamsLong >> EHCI_ECP_SHIFT) &
EHCI_ECP_MASK;
@@ -648,7 +637,7 @@
                     //
                     DPRINT1("[EHCI] acquired ownership\n");
                 }
-
+#if 0
                 //
                 // explictly clear the bios owned flag 2.1.7
                 //
@@ -660,15 +649,11 @@
                 //
                 Caps = 4;
                 m_BusInterface.SetBusData(m_BusInterface.Context, PCI_WHICHSPACE_CONFIG,
&Caps, ExtendedCapsSupport+4, sizeof(ULONG));
-
-
+#endif
             }
         }
     }
 
-
-
-#if 1
     //
     // Stop the controller if its running
     //
@@ -678,7 +663,22 @@
         DPRINT1("Stopping Controller %x\n", UsbSts);
         StopController();
     }
-#endif
+
+    //
+    // Reset the controller
+    //
+    ResetController();
+
+    //
+    // check caps
+    //
+    if (m_Capabilities.HCCParams.CurAddrBits)
+    {
+        //
+        // disable 64-bit addressing
+        //
+        EHCI_WRITE_REGISTER_ULONG(EHCI_CTRLDSSEGMENT, 0x0);
+    }
 
     //
     // Enable Interrupts and start execution
@@ -692,7 +692,6 @@
 
     DPRINT1("Interrupt Mask %x\n", Status);
     ASSERT((Status & Mask) == Mask);
-
 
     //
     // Assign the SyncList Register
@@ -827,8 +826,28 @@
 NTSTATUS
 CUSBHardwareDevice::ResetController(void)
 {
-    UNIMPLEMENTED
-    return STATUS_NOT_IMPLEMENTED;
+    EHCI_USBCMD_CONTENT UsbCmd;
+    ULONG FailSafe;
+
+    GetCommandRegister(&UsbCmd);
+    UsbCmd.HCReset = TRUE;
+    SetCommandRegister(&UsbCmd);
+
+    for (FailSafe = 100; FailSafe > 1; FailSafe--)
+    {
+        KeStallExecutionProcessor(100);
+        GetCommandRegister(&UsbCmd);
+        if (!UsbCmd.HCReset)
+            break;
+    }
+
+    if (UsbCmd.HCReset)
+    {
+        DPRINT1("EHCI ERROR: Controller is not responding to reset
request!\n");
+        return STATUS_UNSUCCESSFUL;
+    }
+
+    return STATUS_SUCCESS;
 }
 
 NTSTATUS