https://git.reactos.org/?p=reactos.git;a=commitdiff;h=025cfb108bdadda4652375...
commit 025cfb108bdadda46523750d9859aadd5bce353d Author: Hermès Bélusca-Maïto hermes.belusca-maito@reactos.org AuthorDate: Sun Jun 23 02:29:01 2019 +0200 Commit: Hermès Bélusca-Maïto hermes.belusca-maito@reactos.org CommitDate: Sun Jun 23 02:59:43 2019 +0200
[BOOTVID] Simplify the code by introducing and using IO port helper macros.
- Move around two header includes. - Remove a redundant assignment in VgaInterpretCmdStream(). --- drivers/base/bootvid/i386/bootvid.c | 101 +++++++++++++++++------------------- drivers/base/bootvid/i386/vga.c | 12 ++--- drivers/base/bootvid/precomp.h | 18 ++++++- 3 files changed, 67 insertions(+), 64 deletions(-)
diff --git a/drivers/base/bootvid/i386/bootvid.c b/drivers/base/bootvid/i386/bootvid.c index 333e5de4faa..2909b6c4a93 100644 --- a/drivers/base/bootvid/i386/bootvid.c +++ b/drivers/base/bootvid/i386/bootvid.c @@ -1,8 +1,5 @@ #include "precomp.h"
-#include <ntifs.h> -#include <ndk/halfuncs.h> - /* PRIVATE FUNCTIONS *********************************************************/
static BOOLEAN @@ -227,9 +224,6 @@ VgaInterpretCmdStream(IN PUSHORT CmdStream) /* Unknown major function, fail */ return FALSE; } - - /* Get the next command */ - Cmd = *CmdStream; }
/* If we got here, return success */ @@ -245,114 +239,115 @@ VgaIsPresent(VOID) UCHAR i;
/* Read the VGA Address Register */ - VgaReg = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE); + VgaReg = __inpb(0x3CE);
/* Select Read Map Select Register */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 4); + __outpb(0x3CE, 4);
- /* Read it back...it should be 4 */ - if (((READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE)) & 0xF) != 4) return FALSE; + /* Read it back... it should be 4 */ + if ((__inpb(0x3CE) & 0xF) != 4) + return FALSE;
/* Read the VGA Data Register */ - VgaReg2 = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF); + VgaReg2 = __inpb(0x3CF);
/* Enable all planes */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 3); + __outpb(0x3CF, 3);
- /* Read it back...it should be 3 */ - if (READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF) != 0x3) + /* Read it back... it should be 3 */ + if (__inpb(0x3CF) != 0x3) { /* Reset the registers and fail */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0); + __outpb(0x3CF, 0); return FALSE; }
/* Select Bit Mask Register */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 8); + __outpb(0x3CE, 8);
- /* Read it back...it should be 8 */ - if (((READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE)) & 0xF) != 8) + /* Read it back... it should be 8 */ + if ((__inpb(0x3CE) & 0xF) != 8) { /* Reset the registers and fail */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 4); - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0); + __outpb(0x3CE, 4); + __outpb(0x3CF, 0); return FALSE; }
/* Read the VGA Data Register */ - VgaReg3 = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF); + VgaReg3 = __inpb(0x3CF);
/* Loop bitmasks */ for (i = 0xBB; i; i >>= 1) { /* Set bitmask */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, i); + __outpb(0x3CF, i);
- /* Read it back...it should be the same */ - if (READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF) != i) + /* Read it back... it should be the same */ + if (__inpb(0x3CF) != i) { /* Reset the registers and fail */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0xFF); - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 4); - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0); + __outpb(0x3CF, 0xFF); + __outpb(0x3CE, 4); + __outpb(0x3CF, 0); return FALSE; } }
/* Select Read Map Select Register */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 4); + __outpb(0x3CE, 4);
- /* Read it back...it should be 3 */ - if (READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF) != 3) + /* Read it back... it should be 3 */ + if (__inpb(0x3CF) != 3) { /* Reset the registers and fail */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0); - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 8); - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 0xFF); + __outpb(0x3CF, 0); + __outpb(0x3CE, 8); + __outpb(0x3CF, 0xFF); return FALSE; }
/* Write the registers we read earlier */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, VgaReg2); - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 8); - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, VgaReg3); - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, VgaReg); + __outpb(0x3CF, VgaReg2); + __outpb(0x3CE, 8); + __outpb(0x3CF, VgaReg3); + __outpb(0x3CE, VgaReg);
/* Read sequencer address */ - SeqReg = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C4); + SeqReg = __inpb(0x3C4);
/* Select memory mode register */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C4, 4); + __outpb(0x3C4, 4);
- /* Read it back...it should still be 4 */ - if (((READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C4)) & 7) != 4) + /* Read it back... it should still be 4 */ + if ((__inpb(0x3C4) & 7) != 4) { - /* Fail */ + /* Fail */ return FALSE; }
/* Read sequencer Data */ - SeqReg2 = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5); + SeqReg2 = __inpb(0x3C5);
/* Write null plane */ - WRITE_PORT_USHORT((PUSHORT)VgaRegisterBase + 0x3C4, 0x100); + __outpw(0x3C4, 0x100);
/* Write sequencer flag */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5, SeqReg2 ^ 8); + __outpb(0x3C5, SeqReg2 ^ 8);
/* Read it back */ - if ((READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5)) != (SeqReg2 ^ 8)) + if (__inpb(0x3C5) != (SeqReg2 ^ 8)) { - /* Not the same value...restore registers and fail */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5, 2); - WRITE_PORT_USHORT((PUSHORT)VgaRegisterBase + 0x3C4, 0x300); + /* Not the same value... restore registers and fail */ + __outpb(0x3C5, 2); + __outpw(0x3C4, 0x300); return FALSE; }
/* Now write the registers we read */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C5, SeqReg2); - WRITE_PORT_USHORT((PUSHORT)VgaRegisterBase + 0x3C4, 0x300); - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3C4, SeqReg); + __outpb(0x3C5, SeqReg2); + __outpw(0x3C4, 0x300); + __outpb(0x3C4, SeqReg);
/* VGA is present! */ return TRUE; @@ -458,7 +453,7 @@ VidInitialize(IN BOOLEAN SetMode) /* Initialize it */ VgaInterpretCmdStream(AT_Initialization); } - + /* VGA is ready */ return TRUE; } diff --git a/drivers/base/bootvid/i386/vga.c b/drivers/base/bootvid/i386/vga.c index dcb02837512..cc2032deaaf 100644 --- a/drivers/base/bootvid/i386/vga.c +++ b/drivers/base/bootvid/i386/vga.c @@ -70,12 +70,6 @@ ULONG curr_y = 0; static ULONG VidTextColor = 0xF; static BOOLEAN CarriageReturn = FALSE;
-#define __outpb(Port, Value) \ - WRITE_PORT_UCHAR((PUCHAR)(VgaRegisterBase + (Port)), (UCHAR)(Value)) - -#define __outpw(Port, Value) \ - WRITE_PORT_USHORT((PUSHORT)(VgaRegisterBase + (Port)), (USHORT)(Value)) - /* PRIVATE FUNCTIONS *********************************************************/
static VOID @@ -88,7 +82,7 @@ ReadWriteMode(IN UCHAR Mode) __outpb(0x3CE, 5);
/* Get the current register value, minus the current mode */ - Value = READ_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF) & 0xF4; + Value = __inpb(0x3CF) & 0xF4;
/* Set the new mode */ __outpb(0x3CF, Mode | Value); @@ -750,10 +744,10 @@ NTAPI VidCleanUp(VOID) { /* Select bit mask register */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CE, 8); + __outpb(0x3CE, 8);
/* Clear it */ - WRITE_PORT_UCHAR((PUCHAR)VgaRegisterBase + 0x3CF, 255); + __outpb(0x3CF, 255); }
/* diff --git a/drivers/base/bootvid/precomp.h b/drivers/base/bootvid/precomp.h index 33fb58c7483..087a6bbf575 100644 --- a/drivers/base/bootvid/precomp.h +++ b/drivers/base/bootvid/precomp.h @@ -2,12 +2,14 @@ #define _BOOTVID_PCH_
#include <ntddk.h> +#include <ntifs.h> +#include <ndk/halfuncs.h> #include <drivers/bootvid/bootvid.h>
/* Define if FontData has upside down characters */ #undef CHAR_GEN_UPSIDE_DOWN
-#define BOOTCHAR_HEIGHT 13 +#define BOOTCHAR_HEIGHT 13
/* Command Stream Definitions */ #define CMD_STREAM_WRITE 0x0 @@ -40,11 +42,23 @@ NTAPI InitializePalette(VOID);
/* Globals */ -extern USHORT AT_Initialization[]; extern ULONG curr_x; extern ULONG curr_y; extern ULONG_PTR VgaRegisterBase; extern ULONG_PTR VgaBase; +extern USHORT AT_Initialization[]; extern UCHAR FontData[256 * BOOTCHAR_HEIGHT];
+#define __inpb(Port) \ + READ_PORT_UCHAR((PUCHAR)(VgaRegisterBase + (Port))) + +#define __inpw(Port) \ + READ_PORT_USHORT((PUSHORT)(VgaRegisterBase + (Port))) + +#define __outpb(Port, Value) \ + WRITE_PORT_UCHAR((PUCHAR)(VgaRegisterBase + (Port)), (UCHAR)(Value)) + +#define __outpw(Port, Value) \ + WRITE_PORT_USHORT((PUSHORT)(VgaRegisterBase + (Port)), (USHORT)(Value)) + #endif /* _BOOTVID_PCH_ */