[tkreuzer] 44825: [HAL] - Move i386 specific code into i386 folder - Move up specific code into up folder
Author: tkreuzer Date: Thu Dec 31 15:57:24 2009 New Revision: 44825
URL: http://svn.reactos.org/svn/reactos?rev=44825&view=rev Log: [HAL] - Move i386 specific code into i386 folder - Move up specific code into up folder
Added: branches/ros-amd64-bringup/reactos/hal/halx86/generic/i386/ (with props) branches/ros-amd64-bringup/reactos/hal/halx86/generic/i386/portio.c - copied unchanged from r44816, branches/ros-amd64-bringup/reactos/hal/halx86/generic/portio.c branches/ros-amd64-bringup/reactos/hal/halx86/generic/i386/systimer.S - copied unchanged from r44816, branches/ros-amd64-bringup/reactos/hal/halx86/generic/systimer.S branches/ros-amd64-bringup/reactos/hal/halx86/generic/i386/v86.s - copied unchanged from r44816, branches/ros-amd64-bringup/reactos/hal/halx86/generic/v86.s branches/ros-amd64-bringup/reactos/hal/halx86/up/irq.S - copied unchanged from r44816, branches/ros-amd64-bringup/reactos/hal/halx86/generic/irq.S branches/ros-amd64-bringup/reactos/hal/halx86/up/processor.c - copied unchanged from r44816, branches/ros-amd64-bringup/reactos/hal/halx86/generic/processor.c branches/ros-amd64-bringup/reactos/hal/halx86/up/spinlock.c - copied unchanged from r44816, branches/ros-amd64-bringup/reactos/hal/halx86/generic/spinlock.c Removed: branches/ros-amd64-bringup/reactos/hal/halx86/generic/irq.S branches/ros-amd64-bringup/reactos/hal/halx86/generic/portio.c branches/ros-amd64-bringup/reactos/hal/halx86/generic/processor.c branches/ros-amd64-bringup/reactos/hal/halx86/generic/spinlock.c branches/ros-amd64-bringup/reactos/hal/halx86/generic/systimer.S branches/ros-amd64-bringup/reactos/hal/halx86/generic/v86.s Modified: branches/ros-amd64-bringup/reactos/hal/halx86/hal_generic.rbuild branches/ros-amd64-bringup/reactos/hal/halx86/hal_generic_up.rbuild
Propchange: branches/ros-amd64-bringup/reactos/hal/halx86/generic/i386/ ------------------------------------------------------------------------------ --- bugtraq:logregex (added) +++ bugtraq:logregex Thu Dec 31 15:57:24 2009 @@ -1,0 +1,2 @@ +([Ii]ssue|[Bb]ug)s? #?(\d+)(,? ?#?(\d+))*(,? ?(and |or )?#?(\d+))? +(\d+)
Propchange: branches/ros-amd64-bringup/reactos/hal/halx86/generic/i386/ ------------------------------------------------------------------------------ bugtraq:message = See issue #%BUGID% for more details.
Propchange: branches/ros-amd64-bringup/reactos/hal/halx86/generic/i386/ ------------------------------------------------------------------------------ bugtraq:url = http://www.reactos.org/bugzilla/show_bug.cgi?id=%BUGID%
Propchange: branches/ros-amd64-bringup/reactos/hal/halx86/generic/i386/ ------------------------------------------------------------------------------ tsvn:logminsize = 10
Removed: branches/ros-amd64-bringup/reactos/hal/halx86/generic/irq.S URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/ha... ============================================================================== --- branches/ros-amd64-bringup/reactos/hal/halx86/generic/irq.S [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/hal/halx86/generic/irq.S (removed) @@ -1,959 +1,0 @@ -/* - * FILE: hal/halx86/generic/irq.S - * COPYRIGHT: See COPYING in the top level directory - * PURPOSE: Software, System and Hardware IRQ Management - * PROGRAMMER: Alex Ionescu (alex@relsoft.net) - */ - -/* INCLUDES ******************************************************************/ - -/* Enable this (and the define in spinlock.c) to make UP HAL work for MP Kernel */ -/* #define CONFIG_SMP */ - -#include <asm.h> -#include <internal/i386/asmmacro.S> -.intel_syntax noprefix - -/* GLOBALS *******************************************************************/ - -PICInitTable: - - /* Master PIC */ - .short 0x20 /* Port */ - .byte 0x11 /* Edge, cascade, CAI 8, ICW4 */ - .byte PRIMARY_VECTOR_BASE /* Base */ - .byte 4 /* IRQ 4 connected to slave */ - .byte 1 /* Non buffered, not nested, 8086 */ - - /* Slave PIC */ - .short 0xA0 /* Port */ - .byte 0x11 /* Edge, cascade, CAI 8, ICW4 */ - .byte PRIMARY_VECTOR_BASE + 8 /* Base */ - .byte 2 /* Slave ID: Slave 2 */ - .byte 1 /* Non buffered, not nested, 8086 */ - - /* End of initialization table */ - .short 0 - -KiI8259MaskTable: - .long 0 /* IRQL 0 */ - .long 0 /* IRQL 1 */ - .long 0 /* IRQL 2 */ - .long 0 /* IRQL 3 */ - .long 0xFF800000 /* IRQL 4 */ - .long 0xFFC00000 /* IRQL 5 */ - .long 0xFFE00000 /* IRQL 6 */ - .long 0xFFF00000 /* IRQL 7 */ - .long 0xFFF80000 /* IRQL 8 */ - .long 0xFFFC0000 /* IRQL 9 */ - .long 0xFFFE0000 /* IRQL 10 */ - .long 0xFFFF0000 /* IRQL 11 */ - .long 0xFFFF8000 /* IRQL 12 */ - .long 0xFFFFC000 /* IRQL 13 */ - .long 0xFFFFE000 /* IRQL 14 */ - .long 0xFFFFF000 /* IRQL 15 */ - .long 0xFFFFF800 /* IRQL 16 */ - .long 0xFFFFFC00 /* IRQL 17 */ - .long 0xFFFFFE00 /* IRQL 18 */ - .long 0xFFFFFE00 /* IRQL 19 */ - .long 0xFFFFFE80 /* IRQL 20 */ - .long 0xFFFFFEC0 /* IRQL 21 */ - .long 0xFFFFFEE0 /* IRQL 22 */ - .long 0xFFFFFEF0 /* IRQL 23 */ - .long 0xFFFFFEF8 /* IRQL 24 */ - .long 0xFFFFFEF8 /* IRQL 25 */ - .long 0xFFFFFEFA /* IRQL 26 */ - .long 0xFFFFFFFA /* IRQL 27 */ - .long 0xFFFFFFFB /* IRQL 28 */ - .long 0xFFFFFFFB /* IRQL 29 */ - .long 0xFFFFFFFB /* IRQL 30 */ - .long 0xFFFFFFFB /* IRQL 31 */ - -FindHigherIrqlMask: - .long 0xFFFFFFFE /* IRQL 0 */ - .long 0xFFFFFFFC /* IRQL 1 */ - .long 0xFFFFFFF8 /* IRQL 2 */ - .long 0xFFFFFFF0 /* IRQL 3 */ - .long 0x7FFFFF0 /* IRQL 4 */ - .long 0x3FFFFF0 /* IRQL 5 */ - .long 0x1FFFFF0 /* IRQL 6 */ - .long 0x0FFFFF0 /* IRQL 7 */ - .long 0x7FFFF0 /* IRQL 8 */ - .long 0x3FFFF0 /* IRQL 9 */ - .long 0x1FFFF0 /* IRQL 10 */ - .long 0x0FFFF0 /* IRQL 11 */ - .long 0x7FFF0 /* IRQL 12 */ - .long 0x3FFF0 /* IRQL 13 */ - .long 0x1FFF0 /* IRQL 14 */ - .long 0x0FFF0 /* IRQL 15 */ - .long 0x7FF0 /* IRQL 16 */ - .long 0x3FF0 /* IRQL 17 */ - .long 0x1FF0 /* IRQL 18 */ - .long 0x1FF0 /* IRQL 19 */ - .long 0x17F0 /* IRQL 20 */ - .long 0x13F0 /* IRQL 21 */ - .long 0x11F0 /* IRQL 22 */ - .long 0x10F0 /* IRQL 23 */ - .long 0x1070 /* IRQL 24 */ - .long 0x1030 /* IRQL 25 */ - .long 0x1010 /* IRQL 26 */ - .long 0x10 /* IRQL 27 */ - .long 0 /* IRQL 28 */ - .long 0 /* IRQL 29 */ - .long 0 /* IRQL 30 */ - .long 0 /* IRQL 31 */ - -HalpSpecialDismissTable: -.rept 7 - .long GenericIRQ /* IRQ 0-7 */ -.endr - .long IRQ7 /* IRQ 7 */ - .rept 5 - .long GenericIRQ /* IRQ 8-12 */ -.endr - .long IRQ13 /* IRQ 13 */ - .long GenericIRQ /* IRQ 14 */ - .long IRQ15 /* IRQ 15 */ -.rept 20 - .long GenericIRQ /* IRQ 16-35 */ -.endr -#if DBG -.rept 172 - .long InvalidIRQ /* IRQ 36-207 */ -.endr -#endif - -HalpSpecialDismissLevelTable: - .rept 7 - .long GenericIRQLevel /* IRQ 0-7 */ - .endr - .long IRQ7Level /* IRQ 7 */ - .rept 5 - .long GenericIRQLevel /* IRQ 8-12 */ - .endr - .long IRQ13Level /* IRQ 13 */ - .long GenericIRQLevel /* IRQ 14 */ - .long IRQ15Level /* IRQ 15 */ - -SWInterruptLookUpTable: - .byte PASSIVE_LEVEL /* IRR 0 */ - .byte PASSIVE_LEVEL /* IRR 1 */ - .byte APC_LEVEL /* IRR 2 */ - .byte APC_LEVEL /* IRR 3 */ - .byte DISPATCH_LEVEL /* IRR 4 */ - .byte DISPATCH_LEVEL /* IRR 5 */ - .byte DISPATCH_LEVEL /* IRR 6 */ - .byte DISPATCH_LEVEL /* IRR 7 */ - -SWInterruptHandlerTable: - .long _KiUnexpectedInterrupt /* PASSIVE_LEVEL */ - .long _HalpApcInterrupt /* APC_LEVEL */ - .long _HalpDispatchInterrupt /* DISPATCH_LEVEL */ - -SWInterruptHandlerTable2: - .long _KiUnexpectedInterrupt /* PASSIVE_LEVEL */ - .long _HalpApcInterrupt2ndEntry /* APC_LEVEL */ - .long _HalpDispatchInterrupt2ndEntry /* DISPATCH_LEVEL */ - -_UnhandledMsg: - .asciz "\n\x7\x7!!! Unhandled or Unexpected Code at line: %lx!!!\n" - -/* FUNCTIONS *****************************************************************/ - -/* HAL interrupt handlers */ -GENERATE_HAL_INT_HANDLERS - -.globl _HalpHardwareInterruptLevel -.func HalpHardwareInterruptLevel -_HalpHardwareInterruptLevel: - - /* Get IRQL and check for pending interrupts */ - mov eax, PCR[KPCR_IRQL] - mov ecx, PCR[KPCR_IRR] - and ecx, FindHigherIrqlMask[eax*4] - jz NothingHardware - - /* Check the active IRR */ - test dword ptr PCR[KPCR_IRR_ACTIVE], 0xFFFFFFF0 - jnz NothingHardware - - /* Check for pending software interrupts */ - mov eax, ecx - bsr ecx, eax - mov eax, 1 - shl eax, cl - - /* Clear IRR */ - xor PCR[KPCR_IRR], eax - - /* Now dispatch the interrupt */ - call SWInterruptHandlerTable[ecx*4] - -NothingHardware: - ret -.endfunc - -.globl _HalpInitPICs@0 -.func HalpInitPICs@0 -_HalpInitPICs@0: - - /* Save ESI and disable interrupts */ - push esi - pushf - cli - - /* Read the init table */ - lea esi, PICInitTable - lodsw - -InitLoop: - - /* Put the port in EDX */ - movzx edx, ax - - /* Initialize the PIC, using a delay for each command */ - outsb - jmp $+2 - inc edx - outsb - jmp $+2 - outsb - jmp $+2 - outsb - jmp $+2 - - /* Mask all interrupts */ - mov al, 0xFF - out dx, al - - /* Check if we're done, otherwise initialize next PIC */ - lodsw - cmp ax, 0 - jnz InitLoop - - /* Read EISA Edge/Level Register */ - mov edx, 0x4D1 - in al, dx - mov ah, al - dec edx - in al, dx - - /* Clear reserved bits and see if there's anything there */ - and eax, 0xDEF8 - cmp eax, 0xDEF8 - jz NoEisa - - /* FIXME */ - //UNHANDLED_PATH - - /* Restore interrupts and return */ -NoEisa: - popf - pop esi - ret -.endfunc - -.globl @HalClearSoftwareInterrupt@4 -.func @HalClearSoftwareInterrupt@4, @HalClearSoftwareInterrupt@4 -@HalClearSoftwareInterrupt@4: - - /* Get IRR mask */ - mov eax, 1 - shl eax, cl - not eax - - /* Set IRR */ - and PCR[KPCR_IRR], eax - ret -.endfunc - -.globl @HalRequestSoftwareInterrupt@4 -.func @HalRequestSoftwareInterrupt@4, @HalRequestSoftwareInterrupt@4 -@HalRequestSoftwareInterrupt@4: - - /* Get IRR mask */ - mov eax, 1 - shl eax, cl - - /* Disable interrupts */ - pushf - cli - - /* Set IRR and get IRQL */ - or PCR[KPCR_IRR], eax - mov ecx, PCR[KPCR_IRQL] - - /* Get software IRR mask */ - mov eax, PCR[KPCR_IRR] - and eax, 3 - - /* Get highest pending software interrupt and check if it's higher */ - xor edx, edx - mov dl, SWInterruptLookUpTable[eax] - cmp dl, cl - jbe AfterCall - - /* Call the pending interrupt */ - call SWInterruptHandlerTable[edx*4] - -AfterCall: - - /* Retore interrupts and return */ - popf - ret -.endfunc - -.globl _HalDisableSystemInterrupt@8 -.func HalDisableSystemInterrupt@8 -_HalDisableSystemInterrupt@8: - - /* Convert to vector */ - movzx ecx, byte ptr [esp+4] - sub ecx, PRIMARY_VECTOR_BASE - - /* Disable interrupts and set the new IDR */ - mov edx, 1 - shl edx, cl - cli - or PCR[KPCR_IDR], edx - - /* Get the current mask */ - xor eax, eax - in al, 0xA1 - shl eax, 8 - in al, 0x21 - - /* Mask off the interrupt and write the new mask */ - or eax, edx - out 0x21, al - shr eax, 8 - out 0xA1, al - - /* Return with interrupts enabled */ - in al, 0xA1 - sti - ret 8 -.endfunc - -.globl _HalEnableSystemInterrupt@12 -.func HalEnableSystemInterrupt@12 -_HalEnableSystemInterrupt@12: - - /* Get the vector and validate it */ - movzx ecx, byte ptr [esp+4] - sub ecx, PRIMARY_VECTOR_BASE - jb Invalid - cmp ecx, CLOCK2_LEVEL - jnb Invalid - -#if 0 - /* Is PCI IRQ Routing enabled? */ - cmp byte ptr _HalpIrqMiniportInitialized, 0 - jz NoMiniport - - /* UNHANDLED */ - UNHANDLED_PATH - -NoMiniport: - /* Check if this is an EISA IRQ */ - bt _HalpEisaIrqIgnore, ecx - jb IgnoredIrq - - /* Clear the EISA Edge/Level Control Register */ - btr _HalpEisaELCR, ecx - - /* Get the interrupt type */ - mov al, [esp+12] - cmp al, 0 - jnz Latched - - /* Check the register again */ - bt _HalpEisaELCR, ecx - jb Dismiss - - /* Check if the miniport is active */ - cmp byte ptr _HalpIrqMiniportInitialized, 0 - jz Dismiss - - /* Update the EISA Edge/Level Control Register */ - bts _HalpEisaELCR, ecx - -Dismiss: - /* Use the level hardware interrupt handler */ - mov dword ptr SWInterruptHandlerTableHardware[ecx*4], offset _HalpHardwareInterruptLevel - mov edx, HalpSpecialDismissLevelTable[ecx*4] - mov HalpSpecialDismissTable[ecx*4], edx - -Latched: - /* Is PCI IRQ Routing enabled? */ - cmp byte ptr _HalpIrqMiniportInitialized, 0 - jz IgnoredIrq - - /* UNHANDLED */ - UNHANDLED_PATH -#endif -IgnoredIrq: - /* Calculate the new IDR */ - mov eax, 1 - shl eax, cl - not eax - cli - and PCR[KPCR_IDR], eax - - /* Get the current IRQL and mask the IRQs in the PIC */ - mov eax, PCR[KPCR_IRQL] - mov eax, KiI8259MaskTable[eax*4] - or eax, PCR[KPCR_IDR] - out 0x21, al - shr eax, 8 - out 0xA1, al - - /* Enable interrupts and return TRUE */ - sti - mov eax, 1 - ret 12 - -Invalid: - - /* Fail, invalid IRQ */ -#if DBG - int 3 -#endif - xor eax, eax - ret 12 -.endfunc - -.globl _HalBeginSystemInterrupt@12 -.func HalBeginSystemInterrupt@12 -_HalBeginSystemInterrupt@12: - - /* Convert to IRQ and call the handler */ - xor ecx, ecx - mov cl, byte ptr [esp+8] - sub ecx, PRIMARY_VECTOR_BASE - jmp HalpSpecialDismissTable[ecx*4] - -IRQ15: - /* This is IRQ 15, check if it's spurious */ - mov al, 0xB - out 0xA0, al - jmp $+2 - in al, 0xA0 - test al, 0x80 - jnz GenericIRQ - - /* Cascaded interrupt... dismiss it and return FALSE */ -CascadedInterrupt: - mov al, 0x62 - out 0x20, al - mov eax, 0 - ret 12 - -IRQ7: - /* This is IRQ 7, check if it's spurious */ - mov al, 0xB - out 0x20, al - jmp $+2 - in al, 0x20 - test al, 0x80 - jnz GenericIRQ - - /* It is, return FALSE */ - mov eax, 0 - ret 12 - -IRQ13: - /* AT 80287 latch clear */ - xor al, al - out 0xF0, al - -GenericIRQ: - /* Get current and new IRQL */ - xor eax, eax - mov al, byte ptr [esp+4] - mov ebx, PCR[KPCR_IRQL] - - /* Set and save old */ - mov PCR[KPCR_IRQL], eax - mov edx, [esp+12] - mov [edx], bl - - /* Set IRQ mask in the PIC */ - mov eax, KiI8259MaskTable[eax*4] - or eax, PCR[KPCR_IDR] - out 0x21, al - shr eax, 8 - out 0xA1, al - - /* Check to which PIC the EOI was sent */ - mov eax, ecx - cmp eax, 8 - jnb Pic1 - - /* Write mask to master PIC */ - or al, 0x60 - out 0x20, al - - /* Enable interrupts and return TRUE */ - sti - mov eax, 1 - ret 12 - -Pic1: - /* Write mask to slave PIC */ - mov al, 0x20 - out 0xA0, al - mov al, 0x62 - out 0x20, al - - /* Enable interrupts and return TRUE */ - sti - mov eax, 1 - ret 12 - -#if DBG -InvalidIRQ: - /* Dismiss it */ - mov eax, 0 - ret 12 -#endif -.endfunc - -IRQ15Level: - /* This is IRQ 15, check if it's spurious */ - mov al, 0xB - out 0xA0, al - jmp $+2 - in al, 0xA0 - test al, 0x80 - jnz GenericIRQLevel - jmp CascadedInterrupt - -IRQ7Level: - /* This is IRQ 7, check if it's spurious */ - mov al, 0xB - out 0x20, al - jmp $+2 - in al, 0x20 - test al, 0x80 - jnz GenericIRQLevel - - /* It is, return FALSE */ -SpuriousInterrupt: - mov eax, 0 - ret 12 - -IRQ13Level: - /* AT 80287 latch clear */ - xor al, al - out 0xF0, al - -GenericIRQLevel: - /* Save IRQL */ - xor eax, eax - mov al, [esp+4] - - /* Set IRQ mask in the PIC */ - mov eax, KiI8259MaskTable[eax*4] - or eax, PCR[KPCR_IDR] - out 0x21, al - shr eax, 8 - out 0xA1, al - - /* Compute new IRR */ - mov eax, ecx - mov ebx, 1 - add ecx, 4 - shl ebx, cl - or PCR[KPCR_IRR], ebx - - /* Get IRQLs */ - mov cl, [esp+4] - mov bl, PCR[KPCR_IRQL] - mov edx, [esp+12] - - /* Check to which PIC the EOI was sent */ - cmp eax, 8 - jnb Pic1Level - - /* Write mask to master PIC */ - or al, 0x60 - out 0x20, al - - /* Check for spurious */ - cmp cl, bl - jbe SpuriousInterrupt - - /* Write IRQL values */ - movzx ecx, cl - mov PCR[KPCR_IRQL], ecx - mov [edx], bl - - /* Enable interrupts and return TRUE */ - sti - mov eax, 1 - ret 12 - -Pic1Level: - /* Write mask to slave and master PIC */ - add al, 0x58 - out 0xA0, al - mov al, 0x62 - out 0x20, al - - /* Was this a lower interrupt? */ - cmp cl, bl - jbe SpuriousInterrupt - - /* Write IRQL values */ - movzx ecx, cl - mov PCR[KPCR_IRQL], ecx - mov [edx], bl - - /* Enable interrupts and return TRUE */ - sti - mov eax, 1 - ret 12 - -.globl _HalEndSystemInterrupt@8 -.func HalEndSystemInterrupt@8 -_HalEndSystemInterrupt@8: - - /* Read IRQL */ - xor ecx, ecx - mov cl, [esp+4] - - /* Check if it's a software interrupt */ - cmp dword ptr PCR[KPCR_IRQL], DISPATCH_LEVEL - jbe SkipMask2 - - /* Hardware interrupt, mask the appropriate IRQs in the PIC */ - mov eax, KiI8259MaskTable[ecx*4] - or eax, PCR[KPCR_IDR] - out 0x21, al - shr eax, 8 - out 0xA1, al - -SkipMask2: - - /* Set IRQL and check if there are pending software interrupts */ - mov PCR[KPCR_IRQL], ecx - mov eax, PCR[KPCR_IRR] - mov al, SWInterruptLookUpTable[eax] - cmp al, cl - ja DoCall - ret 8 - -DoCall: - - /* There are pending software interrupts, call their handlers */ - add esp, 12 - jmp SWInterruptHandlerTable2[eax*4] -.endfunc - -.globl @KfLowerIrql@4 -.func @KfLowerIrql@4 -_@KfLowerIrql@4: -@KfLowerIrql@4: - - /* Cleanup IRQL */ - and ecx, 0xFF - - /* Validate IRQL */ -#if DBG - cmp cl, PCR[KPCR_IRQL] - ja InvalidIrql -#endif - - /* Save flags since we'll disable interrupts */ - pushf - cli - - /* Disable interrupts and check if IRQL is below DISPATCH_LEVEL */ - cmp dword ptr PCR[KPCR_IRQL], DISPATCH_LEVEL - jbe SkipMask - - /* Clear interrupt masks since there's a pending hardware interrupt */ - mov eax, KiI8259MaskTable[ecx*4] - or eax, PCR[KPCR_IDR] - out 0x21, al - shr eax, 8 - out 0xA1, al - -SkipMask: - - /* Set the new IRQL and check if there's a pending software interrupt */ - mov PCR[KPCR_IRQL], ecx - mov eax, PCR[KPCR_IRR] - mov al, SWInterruptLookUpTable[eax] - cmp al, cl - ja DoCall3 - - /* Restore interrupts and return */ - popf - ret - -#if DBG -InvalidIrql: - /* Set HIGH_LEVEL */ - mov eax, PCR[KPCR_IRQL] - mov dword ptr PCR[KPCR_IRQL], HIGH_LEVEL - - /* Bugcheck the system */ - push 3 - push 0 - push ecx - push eax - push IRQL_NOT_LESS_OR_EQUAL - call _KeBugCheckEx@20 -#endif - -DoCall3: - /* There is, call it */ - call SWInterruptHandlerTable[eax*4] - - /* Restore interrupts and return */ - popf - ret -.endfunc - -.globl @KfRaiseIrql@4 -.func @KfRaiseIrql@4 -_@KfRaiseIrql@4: -@KfRaiseIrql@4: - - /* Get the IRQL */ - movzx ecx, cl - mov eax, PCR[KPCR_IRQL] - -#if DBG - /* Validate it */ - cmp eax, ecx - ja InvalidKfRaise -#endif - - /* Check if it's in the software level */ - cmp cl, DISPATCH_LEVEL - jbe SetIrql - - /* Save the current IRQL */ - mov edx, eax - - /* It's a hardware IRQL, so disable interrupts */ - pushf - cli - - /* Set the new IRQL */ - mov PCR[KPCR_IRQL], ecx - - /* Mask the interrupts in the PIC */ - mov eax, KiI8259MaskTable[ecx*4] - or eax, PCR[KPCR_IDR] - out 0x21, al - shr eax, 8 - out 0xA1, al - - /* Restore interrupts and return old IRQL */ - popf - mov eax, edx - ret - -SetIrql: - /* Set the IRQL and return */ - mov PCR[KPCR_IRQL], ecx - ret - -#if DBG -InvalidKfRaise: - /* Set to passive */ - mov dword ptr PCR[KPCR_IRQL], PASSIVE_LEVEL - - /* Bugcheck the system */ - push 9 - push 0 - push ecx - push eax - push IRQL_NOT_GREATER_OR_EQUAL - call _KeBugCheckEx@20 -#endif -.endfunc - -.globl _KeGetCurrentIrql@0 -.func KeGetCurrentIrql@0 -_KeGetCurrentIrql@0: - - /* Return the IRQL */ - mov eax, PCR[KPCR_IRQL] - ret -.endfunc - -.globl _KeRaiseIrqlToDpcLevel@0 -.func KeRaiseIrqlToDpcLevel@0 -_KeRaiseIrqlToDpcLevel@0: - - /* Get the current IRQL */ - mov eax, PCR[KPCR_IRQL] - - /* Set DISPATCH_LEVEL */ - mov dword ptr PCR[KPCR_IRQL], DISPATCH_LEVEL - -#if DBG - /* Make sure we were not higher then synch */ - cmp eax, DISPATCH_LEVEL - ja InvalidRaise -#endif - ret - -#if DBG -InvalidRaise: - /* Bugcheck the system */ - push 1 - push 0 - push DISPATCH_LEVEL - push eax - push IRQL_NOT_GREATER_OR_EQUAL - call _KeBugCheckEx@20 -#endif -.endfunc - -.globl _KeRaiseIrqlToSynchLevel@0 -.func KeRaiseIrqlToSynchLevel@0 -_KeRaiseIrqlToSynchLevel@0: - - /* Get the current IRQL */ - mov eax, PCR[KPCR_IRQL] - - /* Set SYNCH_LEVEL */ - mov dword ptr PCR[KPCR_IRQL], SYNCH_LEVEL - -#if DBG - /* Make sure we were not higher then dispatch */ - cmp eax, SYNCH_LEVEL - ja InvalidSyRaise -#endif - ret - -#if DBG -InvalidSyRaise: - /* Bugcheck the system */ - push 2 - push 0 - push SYNCH_LEVEL - push eax - push IRQL_NOT_GREATER_OR_EQUAL - call _KeBugCheckEx@20 -#endif -.endfunc - -.globl _HalpApcInterrupt -.func HalpApcInterrupt -TRAP_FIXUPS hapc_a, hapc_t, DoFixupV86, DoFixupAbios -_HalpApcInterrupt: - - /* Create fake interrupt stack */ - pop eax - pushf - push cs - push eax - - /* Enter interrupt */ - INT_PROLOG hapc_a, hapc_t, DoPushFakeErrorCode -.endfunc - -.globl _HalpApcInterrupt2ndEntry -.func HalpApcInterrupt2ndEntry -_HalpApcInterrupt2ndEntry: - - /* Save current IRQL and set to APC level */ - push PCR[KPCR_IRQL] - mov dword ptr PCR[KPCR_IRQL], APC_LEVEL - and dword ptr PCR[KPCR_IRR], ~(1 << APC_LEVEL) - - /* Enable interrupts and check if we came from User/V86 mode */ - sti - mov eax, [ebp+KTRAP_FRAME_CS] - and eax, MODE_MASK - test dword ptr [ebp+KTRAP_FRAME_EFLAGS], EFLAGS_V86_MASK - jz DeliverApc - - /* Set user mode delivery */ - or eax, UserMode - -DeliverApc: - - /* Deliver the APCs */ - push ebp - push 0 - push eax - call _KiDeliverApc@12 - - /* Disable interrupts and end it */ - cli - call _HalpEndSoftwareInterrupt@4 - jmp _Kei386EoiHelper@0 -.endfunc - -.globl _HalpDispatchInterrupt -.func HalpDispatchInterrupt -TRAP_FIXUPS hdpc_a, hdpc_t, DoFixupV86, DoFixupAbios -_HalpDispatchInterrupt: - - /* Create fake interrupt stack */ - pop eax - pushf - push cs - push eax - - /* Enter interrupt */ - INT_PROLOG hdpc_a, hdpc_t, DoPushFakeErrorCode -.endfunc - -.globl _HalpDispatchInterrupt2ndEntry -.func HalpDispatchInterrupt2ndEntry -_HalpDispatchInterrupt2ndEntry: - - /* Save current IRQL and set to DPC level */ - push PCR[KPCR_IRQL] - mov dword ptr PCR[KPCR_IRQL], DISPATCH_LEVEL - and dword ptr PCR[KPCR_IRR], ~(1 << DISPATCH_LEVEL) - - /* Enable interrupts and let the kernel handle this */ - sti - call _KiDispatchInterrupt@0 - - /* Disable interrupts and end it */ - cli - call _HalpEndSoftwareInterrupt@4 - jmp _Kei386EoiHelper@0 -.endfunc - -.globl _HalpEndSoftwareInterrupt@4 -.func HalpEndSoftwareInterrupt@4 -_HalpEndSoftwareInterrupt@4: - - /* Get the IRQL and check if we're in the software region */ - movzx ecx, byte ptr [esp+4] - cmp dword ptr PCR[KPCR_IRQL], DISPATCH_LEVEL - jbe SoftwareInt - - /* Set the right mask in the PIC for the hardware IRQ */ - mov eax, KiI8259MaskTable[ecx*4] - or eax, PCR[KPCR_IDR] - out 0x21, al - shr eax, 8 - out 0xA1, al - -SoftwareInt: - /* Check if there are pending software interrupts */ - mov PCR[KPCR_IRQL], ecx - mov eax, PCR[KPCR_IRR] - mov al, SWInterruptLookUpTable[eax] - cmp al, cl - ja DoCall2 - ret 4 - -DoCall2: - /* There are pending softwate interrupts, call their handlers */ - add esp, 8 - jmp SWInterruptHandlerTable2[eax*4] -.endfunc
Removed: branches/ros-amd64-bringup/reactos/hal/halx86/generic/portio.c URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/ha... ============================================================================== --- branches/ros-amd64-bringup/reactos/hal/halx86/generic/portio.c [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/hal/halx86/generic/portio.c (removed) @@ -1,121 +1,0 @@ -/* - * PROJECT: ReactOS HAL - * LICENSE: GPL - See COPYING in the top level directory - * FILE: hal/halx86/generic/portio.c - * PURPOSE: I/O Functions for access to ports - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) - */ - -/* INCLUDES ******************************************************************/ - -#include <hal.h> -#define NDEBUG -#include <debug.h> - -// -// HAL Port to Inlined Port -// -#define H2I(Port) PtrToUshort(Port) - -/* FUNCTIONS *****************************************************************/ - -VOID -NTAPI -READ_PORT_BUFFER_UCHAR(IN PUCHAR Port, - OUT PUCHAR Buffer, - IN ULONG Count) -{ - __inbytestring(H2I(Port), Buffer, Count); -} - -VOID -NTAPI -READ_PORT_BUFFER_USHORT(IN PUSHORT Port, - OUT PUSHORT Buffer, - IN ULONG Count) -{ - __inwordstring(H2I(Port), Buffer, Count); -} - -VOID -NTAPI -READ_PORT_BUFFER_ULONG(IN PULONG Port, - OUT PULONG Buffer, - IN ULONG Count) -{ - __indwordstring(H2I(Port), Buffer, Count); -} - -UCHAR -NTAPI -READ_PORT_UCHAR(IN PUCHAR Port) -{ - return __inbyte(H2I(Port)); -} - -USHORT -NTAPI -READ_PORT_USHORT(IN PUSHORT Port) -{ - return __inword(H2I(Port)); -} - -ULONG -NTAPI -READ_PORT_ULONG(IN PULONG Port) -{ - return __indword(H2I(Port)); -} - -VOID -NTAPI -WRITE_PORT_BUFFER_UCHAR(IN PUCHAR Port, - IN PUCHAR Buffer, - IN ULONG Count) -{ - __outbytestring(H2I(Port), Buffer, Count); -} - -VOID -NTAPI -WRITE_PORT_BUFFER_USHORT(IN PUSHORT Port, - IN PUSHORT Buffer, - IN ULONG Count) -{ - __outwordstring(H2I(Port), Buffer, Count); -} - -VOID -NTAPI -WRITE_PORT_BUFFER_ULONG(IN PULONG Port, - IN PULONG Buffer, - IN ULONG Count) -{ - __outdwordstring(H2I(Port), Buffer, Count); -} - -VOID -NTAPI -WRITE_PORT_UCHAR(IN PUCHAR Port, - IN UCHAR Value) -{ - __outbyte(H2I(Port), Value); -} - -VOID -NTAPI -WRITE_PORT_USHORT(IN PUSHORT Port, - IN USHORT Value) -{ - __outword(H2I(Port), Value); -} - -VOID -NTAPI -WRITE_PORT_ULONG(IN PULONG Port, - IN ULONG Value) -{ - __outdword(H2I(Port), Value); -} - -/* EOF */
Removed: branches/ros-amd64-bringup/reactos/hal/halx86/generic/processor.c URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/ha... ============================================================================== --- branches/ros-amd64-bringup/reactos/hal/halx86/generic/processor.c [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/hal/halx86/generic/processor.c (removed) @@ -1,98 +1,0 @@ -/* - * PROJECT: ReactOS HAL - * LICENSE: GPL - See COPYING in the top level directory - * FILE: hal/halx86/up/processor.c - * PURPOSE: HAL Processor Routines - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) - */ - -/* INCLUDES ******************************************************************/ - -#include <hal.h> -#define NDEBUG -#include <debug.h> - -LONG HalpActiveProcessors; -KAFFINITY HalpDefaultInterruptAffinity; - -/* PRIVATE FUNCTIONS *********************************************************/ - -VOID -NTAPI -HaliHaltSystem(VOID) -{ - /* Disable interrupts and halt the CPU */ - _disable(); - __halt(); -} - -/* FUNCTIONS *****************************************************************/ - -/* - * @implemented - */ -VOID -NTAPI -HalInitializeProcessor(IN ULONG ProcessorNumber, - IN PLOADER_PARAMETER_BLOCK LoaderBlock) -{ - /* Set default IDR and stall count */ - KeGetPcr()->IDR = 0xFFFFFFFB; - KeGetPcr()->StallScaleFactor = INITIAL_STALL_COUNT; - - /* Update the interrupt affinity and processor mask */ - InterlockedBitTestAndSet(&HalpActiveProcessors, ProcessorNumber); - InterlockedBitTestAndSet((PLONG)&HalpDefaultInterruptAffinity, - ProcessorNumber); - - /* Register routines for KDCOM */ - HalpRegisterKdSupportFunctions(); -} - -/* - * @implemented - */ -BOOLEAN -NTAPI -HalAllProcessorsStarted(VOID) -{ - /* Do nothing */ - return TRUE; -} - -/* - * @implemented - */ -BOOLEAN -NTAPI -HalStartNextProcessor(IN PLOADER_PARAMETER_BLOCK LoaderBlock, - IN PKPROCESSOR_STATE ProcessorState) -{ - /* Ready to start */ - return FALSE; -} - -/* - * @implemented - */ -VOID -NTAPI -HalProcessorIdle(VOID) -{ - /* Enable interrupts and halt the processor */ - _enable(); - __halt(); -} - -/* - * @implemented - */ -VOID -NTAPI -HalRequestIpi(KAFFINITY TargetProcessors) -{ - /* Not implemented on UP */ - __debugbreak(); -} - -/* EOF */
Removed: branches/ros-amd64-bringup/reactos/hal/halx86/generic/spinlock.c URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/ha... ============================================================================== --- branches/ros-amd64-bringup/reactos/hal/halx86/generic/spinlock.c [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/hal/halx86/generic/spinlock.c (removed) @@ -1,349 +1,0 @@ -/* - * PROJECT: ReactOS HAL - * LICENSE: GPL - See COPYING in the top level directory - * FILE: hal/halx86/up/spinlock.c - * PURPOSE: Spinlock and Queued Spinlock Support - * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) - */ - -/* INCLUDES ******************************************************************/ - -/* Enable this (and the define in irq.S) to make UP HAL work for MP Kernel */ -/* #define CONFIG_SMP */ - -#include <hal.h> -#define NDEBUG -#include <debug.h> - -#undef KeAcquireSpinLock -#undef KeReleaseSpinLock - -// -// This is duplicated from ke_x.h -// -#ifdef CONFIG_SMP -// -// Spinlock Acquisition at IRQL >= DISPATCH_LEVEL -// -FORCEINLINE -VOID -KxAcquireSpinLock(IN PKSPIN_LOCK SpinLock) -{ - /* Make sure that we don't own the lock already */ - if (((KSPIN_LOCK)KeGetCurrentThread() | 1) == *SpinLock) - { - /* We do, bugcheck! */ - KeBugCheckEx(SPIN_LOCK_ALREADY_OWNED, (ULONG_PTR)SpinLock, 0, 0, 0); - } - - for (;;) - { - /* Try to acquire it */ - if (InterlockedBitTestAndSet((PLONG)SpinLock, 0)) - { - /* Value changed... wait until it's locked */ - while (*(volatile KSPIN_LOCK *)SpinLock == 1) - { -#ifdef DBG - /* On debug builds, we use a much slower but useful routine */ - //Kii386SpinOnSpinLock(SpinLock, 5); - - /* FIXME: Do normal yield for now */ - YieldProcessor(); -#else - /* Otherwise, just yield and keep looping */ - YieldProcessor(); -#endif - } - } - else - { -#ifdef DBG - /* On debug builds, we OR in the KTHREAD */ - *SpinLock = (KSPIN_LOCK)KeGetCurrentThread() | 1; -#endif - /* All is well, break out */ - break; - } - } -} - -// -// Spinlock Release at IRQL >= DISPATCH_LEVEL -// -FORCEINLINE -VOID -KxReleaseSpinLock(IN PKSPIN_LOCK SpinLock) -{ -#ifdef DBG - /* Make sure that the threads match */ - if (((KSPIN_LOCK)KeGetCurrentThread() | 1) != *SpinLock) - { - /* They don't, bugcheck */ - KeBugCheckEx(SPIN_LOCK_NOT_OWNED, (ULONG_PTR)SpinLock, 0, 0, 0); - } -#endif - /* Clear the lock */ - InterlockedAnd((PLONG)SpinLock, 0); -} - -#else - -// -// Spinlock Acquire at IRQL >= DISPATCH_LEVEL -// -FORCEINLINE -VOID -KxAcquireSpinLock(IN PKSPIN_LOCK SpinLock) -{ - /* On UP builds, spinlocks don't exist at IRQL >= DISPATCH */ - UNREFERENCED_PARAMETER(SpinLock); -} - -// -// Spinlock Release at IRQL >= DISPATCH_LEVEL -// -FORCEINLINE -VOID -KxReleaseSpinLock(IN PKSPIN_LOCK SpinLock) -{ - /* On UP builds, spinlocks don't exist at IRQL >= DISPATCH */ - UNREFERENCED_PARAMETER(SpinLock); -} - -#endif - -/* FUNCTIONS *****************************************************************/ - -/* - * @implemented - */ -VOID -NTAPI -KeAcquireSpinLock(PKSPIN_LOCK SpinLock, - PKIRQL OldIrql) -{ - /* Call the fastcall function */ - *OldIrql = KfAcquireSpinLock(SpinLock); -} - -/* - * @implemented - */ -KIRQL -FASTCALL -KeAcquireSpinLockRaiseToSynch(PKSPIN_LOCK SpinLock) -{ - KIRQL OldIrql; - - /* Raise to sync */ - KeRaiseIrql(SYNCH_LEVEL, &OldIrql); - - /* Acquire the lock and return */ - KxAcquireSpinLock(SpinLock); - return OldIrql; -} - -/* - * @implemented - */ -VOID -NTAPI -KeReleaseSpinLock(PKSPIN_LOCK SpinLock, - KIRQL NewIrql) -{ - /* Call the fastcall function */ - KfReleaseSpinLock(SpinLock, NewIrql); -} - -/* - * @implemented - */ -KIRQL -FASTCALL -KfAcquireSpinLock(PKSPIN_LOCK SpinLock) -{ - KIRQL OldIrql; - - /* Raise to dispatch and acquire the lock */ - KeRaiseIrql(DISPATCH_LEVEL, &OldIrql); - KxAcquireSpinLock(SpinLock); - return OldIrql; -} - -/* - * @implemented - */ -VOID -FASTCALL -KfReleaseSpinLock(PKSPIN_LOCK SpinLock, - KIRQL OldIrql) -{ - /* Release the lock and lower IRQL back */ - KxReleaseSpinLock(SpinLock); - KeLowerIrql(OldIrql); -} - -/* - * @implemented - */ -KIRQL -FASTCALL -KeAcquireQueuedSpinLock(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber) -{ - KIRQL OldIrql; - - /* Raise to dispatch */ - KeRaiseIrql(DISPATCH_LEVEL, &OldIrql); - - /* Acquire the lock */ - KxAcquireSpinLock(KeGetCurrentPrcb()->LockQueue[LockNumber].Lock); // HACK - return OldIrql; -} - -/* - * @implemented - */ -KIRQL -FASTCALL -KeAcquireQueuedSpinLockRaiseToSynch(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber) -{ - KIRQL OldIrql; - - /* Raise to synch */ - KeRaiseIrql(SYNCH_LEVEL, &OldIrql); - - /* Acquire the lock */ - KxAcquireSpinLock(KeGetCurrentPrcb()->LockQueue[LockNumber].Lock); // HACK - return OldIrql; -} - -/* - * @implemented - */ -VOID -FASTCALL -KeAcquireInStackQueuedSpinLock(IN PKSPIN_LOCK SpinLock, - IN PKLOCK_QUEUE_HANDLE LockHandle) -{ - /* Set up the lock */ - LockHandle->LockQueue.Next = NULL; - LockHandle->LockQueue.Lock = SpinLock; - - /* Raise to dispatch */ - KeRaiseIrql(DISPATCH_LEVEL, &LockHandle->OldIrql); - - /* Acquire the lock */ - KxAcquireSpinLock(LockHandle->LockQueue.Lock); // HACK -} - -/* - * @implemented - */ -VOID -FASTCALL -KeAcquireInStackQueuedSpinLockRaiseToSynch(IN PKSPIN_LOCK SpinLock, - IN PKLOCK_QUEUE_HANDLE LockHandle) -{ - /* Set up the lock */ - LockHandle->LockQueue.Next = NULL; - LockHandle->LockQueue.Lock = SpinLock; - - /* Raise to synch */ - KeRaiseIrql(SYNCH_LEVEL, &LockHandle->OldIrql); - - /* Acquire the lock */ - KxAcquireSpinLock(LockHandle->LockQueue.Lock); // HACK -} - -/* - * @implemented - */ -VOID -FASTCALL -KeReleaseQueuedSpinLock(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber, - IN KIRQL OldIrql) -{ - /* Release the lock */ - KxReleaseSpinLock(KeGetCurrentPrcb()->LockQueue[LockNumber].Lock); // HACK - - /* Lower IRQL back */ - KeLowerIrql(OldIrql); -} - -/* - * @implemented - */ -VOID -FASTCALL -KeReleaseInStackQueuedSpinLock(IN PKLOCK_QUEUE_HANDLE LockHandle) -{ - /* Simply lower IRQL back */ - KxReleaseSpinLock(LockHandle->LockQueue.Lock); // HACK - KeLowerIrql(LockHandle->OldIrql); -} - -/* - * @implemented - */ -BOOLEAN -FASTCALL -KeTryToAcquireQueuedSpinLockRaiseToSynch(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber, - IN PKIRQL OldIrql) -{ -#ifdef CONFIG_SMP - ASSERT(FALSE); // FIXME: Unused - while (TRUE); -#endif - - /* Simply raise to synch */ - KeRaiseIrql(SYNCH_LEVEL, OldIrql); - - /* Always return true on UP Machines */ - return TRUE; -} - -/* - * @implemented - */ -LOGICAL -FASTCALL -KeTryToAcquireQueuedSpinLock(IN KSPIN_LOCK_QUEUE_NUMBER LockNumber, - OUT PKIRQL OldIrql) -{ -#ifdef CONFIG_SMP - ASSERT(FALSE); // FIXME: Unused - while (TRUE); -#endif - - /* Simply raise to dispatch */ - KeRaiseIrql(DISPATCH_LEVEL, OldIrql); - - /* Always return true on UP Machines */ - return TRUE; -} - -#undef KeRaiseIrql -/* - * @implemented - */ -VOID -NTAPI -KeRaiseIrql(KIRQL NewIrql, - PKIRQL OldIrql) -{ - /* Call the fastcall function */ - *OldIrql = KfRaiseIrql(NewIrql); -} - -#undef KeLowerIrql -/* - * @implemented - */ -VOID -NTAPI -KeLowerIrql(KIRQL NewIrql) -{ - /* Call the fastcall function */ - KfLowerIrql(NewIrql); -}
Removed: branches/ros-amd64-bringup/reactos/hal/halx86/generic/systimer.S URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/ha... ============================================================================== --- branches/ros-amd64-bringup/reactos/hal/halx86/generic/systimer.S [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/hal/halx86/generic/systimer.S (removed) @@ -1,659 +1,0 @@ -/* - * FILE: hal/halx86/generic/timer.S - * COPYRIGHT: See COPYING in the top level directory - * PURPOSE: System Timer Interrupt and Management - * PROGRAMMER: Alex Ionescu (alex@relsoft.net) - */ - -/* INCLUDES ******************************************************************/ - -#include <asm.h> -#include <internal/i386/asmmacro.S> -.intel_syntax noprefix - -/* GLOBALS *******************************************************************/ - -_HalpLastPerfCounterLow: .long 0 -_HalpLastPerfCounterHigh: .long 0 -_HalpPerfCounterLow: .long 0 -_HalpPerfCounterHigh: .long 0 -_HalpSystemHardwareFlags: .long 0 - -_UnhandledMsg: - .asciz "\n\x7\x7!!! Unhandled or Unexpected Code at line: %lx!!!\n" - -/* FUNCTIONS *****************************************************************/ - -.global _HalpReleaseCmosSpinLock@0 -.func HalpReleaseCmosSpinLock@0 -_HalpReleaseCmosSpinLock@0: - -#ifdef CONFIG_SMP - /* Save clobbered register */ - push eax - - /* Push saved EFLAGS */ - push _HalpSystemHardwareFlags - - /* Release the lock */ - lea eax, _HalpSystemHardwareLock - RELEASE_SPINLOCK(eax) - - /* Restore EFLAGS */ - popf - - /* Return */ - pop eax - ret -#else - /* Restore EFLAGS and return */ - push _HalpSystemHardwareFlags - popf - ret -#endif - -.endfunc - -.global _HalpAcquireSystemHardwareSpinLock@0 -.func HalpAcquireSystemHardwareSpinLock@0 -_HalpAcquireSystemHardwareSpinLock@0: - -#ifdef CONFIG_SMP - /* Save clobbered register */ - push eax - -HardwareLock: - /* Save EFLAGS and disable interrupts */ - pushf - cli - - /* This is the CMOS lock, acquire it */ - lea eax, _HalpSystemHardwareLock - ACQUIRE_SPINLOCK(eax, CmosSpin) - - /* We have it, return the flags */ - pop _HalpSystemHardwareFlags - pop eax - ret - -CmosSpin: - - /* Restore EFLAGS */ - pushf _HalpSystemHardwareLock - popf - - /* Spin */ - SPIN_ON_LOCK(eax, HardwareLock) -#else - /* Save EFLAGS, disable interrupts and return */ - pushf - cli - pop _HalpSystemHardwareFlags - ret -#endif - -.endfunc - -.global _HalpCalibrateStallExecution@0 -.func HalpCalibrateStallExecution@0 -_HalpCalibrateStallExecution@0: - - /* Setup the stack frame */ - push ebp - mov ebp, esp - sub esp, 12 - - /* Save EFLAGS and kill interrupts */ - pushf - cli - - /* Get the current interrupt mask on the PICs */ - xor eax, eax - in al, 0xA1 - shl eax, 8 - in al, 0x21 - - /* Save it */ - push eax - - /* Now mask everything except the RTC and PIC 2 chain-interrupt */ - mov eax, ~((1 << 2) | (1 << 8)) - - /* Program the PICs */ - out 0x21, al - shr eax, 8 - out 0xA1, al - - /* Now get the IDT */ - sidt [ebp-8] - mov ecx, [ebp-6] - - /* Get the IDT entry for the RTC */ - mov eax, 0x38 - shl eax, 3 - add ecx, eax - - /* Save the original RTC ISR */ - push [ecx] - push [ecx+4] - push ecx - - /* Now load our new handler */ - mov eax, offset OnlyOnePersonCanWriteHalCode - mov [ecx], ax - mov word ptr [ecx+2], KGDT_R0_CODE - mov word ptr [ecx+4], 0x8E00 - shr eax, 16 - mov [ecx+6], ax - - /* Reset our counter */ - mov dword ptr [ebp-12], 0 - - /* Acquire CMOS lock */ - call _HalpAcquireSystemHardwareSpinLock@0 - - /* Now initialize register A on the CMOS */ - mov ax, (0x2D << 8) | 0xA - out 0x70, al - jmp $+2 - mov al, ah - out 0x71, al - jmp $+2 - - /* Read register B */ - mov ax, 0xB - out 0x70, al - jmp $+2 - in al, 0x71 - jmp $+2 - - /* Don't touch the LastKnownGoodConfig hack */ - and al, 1 - mov ah, al - - /* Enable the interrupt */ - or ah, 0x42 - - /* Now write the register B */ - mov al, 0xB - out 0x70, al - jmp $+2 - mov al, ah - out 0x71, al - jmp $+2 - - /* Read register C */ - mov al, 0xC - out 0x70, al - jmp $+2 - in al, 0x71 - jmp $+2 - - /* Read register D */ - mov al, 0xD - out 0x70, al - jmp $+2 - in al, 0x71 - jmp $+2 - - /* Release CMOS lock */ - mov dword ptr [ebp-12], 0 - call _HalpReleaseCmosSpinLock@0 - - /* Initialize looper */ - xor eax, eax - - /* Align to 16 bytes */ - .align 16 - - /* Enable interrupts! */ - sti - jmp Looper - - /* Align to 16 bytes */ - .align 16 - - /* Subtract one count */ -Looper: - sub eax, 1 - jnz Looper - - /* ASSERT: If we got here, then the RTC never fired */ - call _DbgBreakPoint@0 - jmp Looper - -OnlyOnePersonCanWriteHalCode: - /*********************** THIS IS THE RTC HANDLER **************************/ - - /* Increment the interrupt count and check if this is the first one */ - inc dword ptr [ebp-12] - cmp dword ptr [ebp-12], 1 - jnz ComputeStall - - /* - * It is the first one -- we'll ignore it, since it fires randomly! - * Get rid of the old return address and push the new one in (our looper) - */ - pop eax - push offset Looper - - /* Acquire CMOS lock */ - call _HalpAcquireSystemHardwareSpinLock@0 - - /* Now initialize register A on the CMOS */ - mov ax, (0x2D << 8) | 0xA - out 0x70, al - jmp $+2 - mov al, ah - out 0x71, al - jmp $+2 - - /* Read register B */ - mov ax, 0xB - out 0x70, al - jmp $+2 - in al, 0x71 - jmp $+2 - - /* Don't touch the LastKnownGoodConfig hack */ - and al, 1 - mov ah, al - - /* Enable the interrupt */ - or ah, 0x42 - - /* Now write the register B */ - mov al, 0xB - out 0x70, al - jmp $+2 - mov al, ah - out 0x71, al - jmp $+2 - - /* Read register C */ - mov al, 0xC - out 0x70, al - jmp $+2 - in al, 0x71 - jmp $+2 - - /* Read register D */ - mov al, 0xD - out 0x70, al - jmp $+2 - in al, 0x71 - jmp $+2 - - /* Release CMOS lock */ - call _HalpReleaseCmosSpinLock@0 - - /* Dismiss the interrupt */ - mov al, 0x20 - out 0xA0, al - mov al, 0x62 - out 0x20, al - - /* Reset the counter and return back to the looper */ - xor eax, eax - iretd - - /******************* THIS IS THE 2ND RTC HANDLER **************************/ -ComputeStall: - - /* Do the calculation */ - neg eax - xor edx, edx - mov ecx, 125000 /* RTC fires every 125 ms */ - div ecx - - /* Is the remainder 0? */ - cmp edx, 0 - jz FoundFactor - - /* Otherwise fix-up the loop count */ - inc eax - -FoundFactor: - /* Save the stall scale factor */ - mov fs:[KPCR_STALL_SCALE_FACTOR], eax - - /* Prepare for interrupt return */ - pop eax - push offset AndItsNotYou - mov eax, 0x13 - - /* Acquire CMOS lock */ - call _HalpAcquireSystemHardwareSpinLock@0 - - /* Now initialize register A on the CMOS */ - mov ax, (0x2D << 8) | 0xA - out 0x70, al - jmp $+2 - mov al, ah - out 0x71, al - jmp $+2 - - /* Read register B */ - mov ax, 0xB - out 0x70, al - jmp $+2 - in al, 0x71 - jmp $+2 - - /* Don't touch the LastKnownGoodConfig hack */ - and al, 1 - mov ah, al - - /* Disable the interrupt */ - or ah, 0x2 - - /* Now write the register B */ - mov al, 0xB - out 0x70, al - jmp $+2 - mov al, ah - out 0x71, al - jmp $+2 - - /* Read register C */ - mov al, 0xC - out 0x70, al - jmp $+2 - in al, 0x71 - jmp $+2 - - /* Release CMOS lock */ - call _HalpReleaseCmosSpinLock@0 - - /* Dismiss the interrupt */ - mov al, 0x20 - out 0xA0, al - mov al, 0x62 - out 0x20, al - - /* Disable interrupts on return */ - and word ptr [esp+8], ~EFLAGS_INTERRUPT_MASK - iretd - - /************************* WE ARE BACK FROM RTC ***************************/ -AndItsNotYou: - - /* Restore the IDT */ - pop ecx - pop [ecx+4] - pop [ecx] - - /* Restore the mask */ - pop eax - out 0x21, al - shr eax, 8 - out 0xA1, al - - /* Restore EFLAGS */ - popf - - /* Restore stack and return */ - mov esp, ebp - pop ebp - ret -.endfunc - -.globl _KeStallExecutionProcessor@4 -.func KeStallExecutionProcessor@4 -_KeStallExecutionProcessor@4: - - /* Get the number of microseconds required */ - mov ecx, [esp+4] - jecxz Done - - /* Multiply by the stall factor */ - mov eax, fs:[KPCR_STALL_SCALE_FACTOR] - mul ecx - - /* Align to 16 bytes */ - .align 16 - - /* Jump to subtraction loop */ - jmp SubtractLoop - - /* Align to 16 bytes */ - .align 16 - - /* Subtract one count */ -SubtractLoop: - sub eax, 1 - jnz SubtractLoop - -Done: - /* Return */ - ret 4 -.endfunc - -.global _KeQueryPerformanceCounter@4 -.func KeQueryPerformanceCounter@4 -_KeQueryPerformanceCounter@4: - - /* Check if we were called too early */ - cmp dword ptr _HalpCurrentRollOver, 0 - je NoCount - - /* Save volatiles */ - push ebx - push esi - -LoopPreInt: - - /* Disable interrupts */ - pushf - cli - -LoopPostInt: - - /* Get the current value */ - mov ebx, _HalpPerfCounterLow - mov esi, _HalpPerfCounterHigh - - /* Read 8254 timer */ - mov al, 0 - out 0x43, al - jmp $+2 - in al, 0x40 - jmp $+2 - movzx ecx, al - in al, 0x40 - mov ch, al - - /* Enable interrupts and do a short wait */ - popf - nop - jmp $+2 - - /* Disable them again */ - pushf - cli - - /* Get the counter value again */ - mov eax, _HalpPerfCounterLow - mov edx, _HalpPerfCounterHigh - - /* Check if someone updated the counter */ - cmp eax, ebx - jnz LoopPostInt - cmp edx, esi - jnz LoopPostInt - - /* Check if the current 8254 value causes rollover */ - neg ecx - add ecx, _HalpCurrentRollOver - jnb DoRollOver - -SetSum: - - /* Calculate the sum */ - add eax, ecx - adc edx, 0 - - /* Check if we're above or below the last high value */ - cmp edx, _HalpLastPerfCounterHigh - jb short BelowHigh - jnz short BelowLow - - /* Check if we're above or below the last low value */ - cmp eax, _HalpLastPerfCounterLow - jb BelowHigh - -BelowLow: - - /* Update the last value and bring back interrupts */ - mov _HalpLastPerfCounterLow, eax - mov _HalpLastPerfCounterHigh, edx - popf - - /* Check if caller wants frequency */ - cmp dword ptr [esp+12], 0 - jz ReturnNoFreq - - /* Save hard-coded frequency */ - mov ecx, dword ptr [esp+12] - mov dword ptr [ecx], 1193182 - mov dword ptr [ecx+4], 0 - -ReturnNoFreq: - - /* Restore volatiles */ - pop esi - pop ebx - ret 4 - -NoCount: - - /* Return empty, called too soon */ - mov eax, 0 - mov edx, 0 - ret 4 - -DoRollOver: - - /* We might have an incoming interrupt, save EFLAGS and reset rollover */ - mov esi, [esp] - mov ecx, _HalpCurrentRollOver - popf - - /* Check if interrupts were enabled and try again */ - test esi, EFLAGS_INTERRUPT_MASK - jnz LoopPreInt - - /* They're not, continue where we left */ - pushf - jmp SetSum - -BelowHigh: - - /* Get the last counter values */ - mov ebx, _HalpLastPerfCounterLow - mov esi, _HalpLastPerfCounterHigh - - /* Check if the previous value was 0 and go back if yes */ - mov ecx, ebx - or ecx, esi - jz BelowLow - - /* Make sure that the count is still valid */ - sub ebx, eax - sbb esi, edx - jnz InvalidCount - cmp ebx, _HalpCurrentRollOver - jg InvalidCount - - /* Fixup the count with the last known value */ - sub eax, ebx - sbb edx, esi - - /* We might have an incoming interrupt, save EFLAGS */ - mov ecx, [esp] - popf - - /* Check if interrupts were enabled and try again */ - test ecx, EFLAGS_INTERRUPT_MASK - jnz LoopPreInt - - /* They're not, continue where we left */ - pushf - jmp BelowLow - -InvalidCount: - popf - xor eax, eax - mov _HalpLastPerfCounterLow, eax - mov _HalpLastPerfCounterHigh, eax - jmp LoopPreInt -.endfunc - -.globl _HalpClockInterrupt@0 -.func HalpClockInterrupt@0 -TRAP_FIXUPS hci_a, hci_t, DoFixupV86, DoFixupAbios -_HalpClockInterrupt@0: - - /* Enter trap */ - INT_PROLOG hci_a, hci_t, DoPushFakeErrorCode - - /* Push vector and make stack for IRQL */ - push 0x30 - sub esp, 4 - - /* Begin the interrupt */ - push esp - push 0x30 - push CLOCK2_LEVEL - call _HalBeginSystemInterrupt@12 - - /* Check if it's spurious */ - or al, al - jz Spurious - - /* Update the performance counter */ - xor ebx, ebx - mov eax, _HalpCurrentRollOver - add _HalpPerfCounterLow, eax - adc _HalpPerfCounterHigh, ebx - - /* Get the time increment and check if someone changed the clock rate */ - mov eax, _HalpCurrentTimeIncrement - cmp _HalpClockSetMSRate, ebx - jz _KeUpdateSystemTime@0 - - /* FIXME: Someone did! */ - int 3 - -Spurious: - - /* Exit the interrupt */ - add esp, 8 - jmp _Kei386EoiHelper@0 -.endfunc - -.globl _HalpProfileInterrupt@0 -.func HalpProfileInterrupt@0 -TRAP_FIXUPS hpi_a, hpi_t, DoFixupV86, DoFixupAbios -_HalpProfileInterrupt@0: - - /* Enter trap */ - INT_PROLOG hpi_a, hpi_t, DoPushFakeErrorCode - - /* Push vector and make stack for IRQL */ - push 0x38 - sub esp, 4 - - /* Begin the interrupt */ - push esp - push 0x38 - push PROFILE_LEVEL - call _HalBeginSystemInterrupt@12 - - /* Check if it's spurious */ - or al, al - jz Spurious - - /* FIXME: We should not be getting profile interrupts yet! */ - int 3 -.endfunc
Removed: branches/ros-amd64-bringup/reactos/hal/halx86/generic/v86.s URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/ha... ============================================================================== --- branches/ros-amd64-bringup/reactos/hal/halx86/generic/v86.s [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/hal/halx86/generic/v86.s (removed) @@ -1,417 +1,0 @@ -/* - * FILE: hal/halx86/generic/bios.S - * COPYRIGHT: See COPYING in the top level directory - * PURPOSE: V8086 Real-Mode BIOS Thunking - * PROGRAMMER: Alex Ionescu (alex@relsoft.net) - */ - -/* INCLUDES ******************************************************************/ - -#include <asm.h> -#include <internal/i386/asmmacro.S> -.intel_syntax noprefix - -// -// HAL BIOS Frame -// -#define HALP_BIOS_FRAME_SS 0x00 -#define HALP_BIOS_FRAME_ESP 0x04 -#define HALP_BIOS_FRAME_EFLAGS 0x08 -#define HALP_BIOS_FRAME_CS 0x0C -#define HALP_BIOS_FRAME_EIP 0x10 -#define HALP_BIOS_FRAME_TRAP_FRAME 0x14 -#define HALP_BIOS_FRAME_CS_LIMIT 0x18 -#define HALP_BIOS_FRAME_CS_BASE 0x1C -#define HALP_BIOS_FRAME_CS_FLAGS 0x20 -#define HALP_BIOS_FRAME_SS_LIMIT 0x24 -#define HALP_BIOS_FRAME_SS_BASE 0x28 -#define HALP_BIOS_FRAME_SS_FLAGS 0x2C -#define HALP_BIOS_FRAME_PREFIX 0x30 -#define HALP_BIOS_FRAME_LENGTH 0x34 - -/* GLOBALS *******************************************************************/ - -_HalpSavedEsp: - .long 0 - -_UnhandledMsg: - .asciz "\n\x7\x7!!! Unhandled or Unexpected Code at line: %lx!!!\n" - -/* FUNCTIONS *****************************************************************/ - -.globl _HalpBiosCall@0 -.func HalpBiosCall@0 -_HalpBiosCall@0: - - /* Set up stack pointer */ - push ebp - mov ebp, esp - - /* Build a trap frame */ - pushfd - push edi - push esi - push ebx - push ds - push es - push fs - push gs - push offset _HalpRealModeEnd - - /* Save the stack */ - mov _HalpSavedEsp, esp - - /* Turn off alignment faults */ - mov eax, cr0 - and eax, ~CR0_AM - mov cr0, eax - - /* Setup a new stack */ - mov esi, fs:KPCR_TSS - mov eax, esp - sub eax, NPX_FRAME_LENGTH - mov [esi+KTSS_ESP0], eax - - /* Save V86 registers */ - push 0 - push 0 - push 0 - push 0 - push 0x2000 - - /* Get linear delta between stack and code */ - mov eax, offset _HalpRealModeEnd-4 - sub eax, offset _HalpRealModeStart - - /* Get offset of code */ - mov edx, offset _HalpRealModeStart - and edx, 0xFFF - - /* Add offset to linear address and save the new V86 SP */ - add eax, edx - push eax - - /* Start building interrupt frame. Setup V86 EFLAGS and IOPL 3 */ - pushfd - or dword ptr [esp], EFLAGS_V86_MASK - or dword ptr [esp], 0x3000 - - /* Push the CS and IP */ - push 0x2000 - push edx - - /* Do the interrupt return (jump to V86 mode) */ - iretd - -.globl _HalpRealModeStart -_HalpRealModeStart: - - /* Set mode 13 */ - mov ax, 0x12 - .byte 0 - .byte 0 - - /* Do the interrupt */ - int 0x10 - - /* BOP to exit V86 mode */ - .byte 0xC4 - .byte 0xC4 - - /* The stack lives here */ -.align 4 - .space 2048 -.globl _HalpRealModeEnd -_HalpRealModeEnd: - - /* We're back, clean up the trap frame */ - pop gs - pop fs - pop es - pop ds - pop ebx - pop esi - pop edi - popfd - - /* Return to caller */ - pop ebp - ret 0 -.endfunc - -.globl _HalpOpcodeInvalid@0 -.func HalpOpcodeInvalid@0 -_HalpOpcodeInvalid@0: - - /* Unhandled */ - UNHANDLED_PATH - - /* Nothing to return */ - xor eax, eax - ret 0 -.endfunc - -.globl _HalpPushInt@0 -.func HalpPushInt@0 -_HalpPushInt@0: - - /* Save EBX */ - push ebx - - /* Get SS offset and base */ - mov edx, [esi+HALP_BIOS_FRAME_ESP] - mov ebx, [esi+HALP_BIOS_FRAME_SS_BASE] - - /* Convert to 16-bits */ - and edx, 0xFFFF - sub dx, 2 - - /* Get EFLAGS and write them into the linear address of SP */ - mov ax, word ptr [esi+HALP_BIOS_FRAME_EFLAGS] - mov [ebx+edx], ax - sub dx, 2 - - /* Get CS segment and write it into SP */ - mov ax, word ptr [esi+HALP_BIOS_FRAME_CS] - mov [ebx+edx], ax - sub dx, 2 - - /* Get IP and write it into SP */ - mov ax, word ptr [esi+HALP_BIOS_FRAME_EIP] - mov [ebx+edx], ax - - /* Get new IP value (the interrupt ID is in ECX, so this is in the IVT) */ - mov eax, [ecx*4] - push eax - - /* Now save the new IP */ - movzx eax, ax - mov [esi+HALP_BIOS_FRAME_EIP], eax - - /* Save the new CS of this IP */ - pop eax - shr eax, 16 - mov [esi+HALP_BIOS_FRAME_CS], eax - - /* Update the stack pointer after our manual interrupt frame construction */ - mov word ptr [esi+HALP_BIOS_FRAME_ESP], dx - - /* Get CS and convert it to linear format */ - mov eax, [esi+HALP_BIOS_FRAME_CS] - shl eax, 4 - mov [esi+HALP_BIOS_FRAME_CS_BASE], eax - mov dword ptr [esi+HALP_BIOS_FRAME_CS_LIMIT], 0xFFFF - mov dword ptr [esi+HALP_BIOS_FRAME_CS_FLAGS], 0 - - /* Return success and restore EBX */ - mov eax, 1 - pop ebx - ret 0 -.endfunc - -.globl _HalpOpcodeINTnn@0 -.func HalpOpcodeINTnn@0 -_HalpOpcodeINTnn@0: - - /* Save non-volatiles and stack */ - push ebp - push esi - push ebx - - /* Get SS and convert it to linear format */ - mov eax, [esi+HALP_BIOS_FRAME_SS] - shl eax, 4 - mov [esi+HALP_BIOS_FRAME_SS_BASE], eax - mov dword ptr [esi+HALP_BIOS_FRAME_SS_LIMIT], 0xFFFF - mov dword ptr [esi+HALP_BIOS_FRAME_SS_FLAGS], 0 - - /* Increase IP and check if we're past the CS limit */ - inc dword ptr [esi+HALP_BIOS_FRAME_EIP] - mov edi, [esi+HALP_BIOS_FRAME_EIP] - cmp edi, [esi+HALP_BIOS_FRAME_CS_LIMIT] - ja EipLimitReached - - /* Convert IP to linear address and read the interrupt number */ - add edi, [esi+HALP_BIOS_FRAME_CS_BASE] - movzx ecx, byte ptr [edi] - - /* Increase EIP and do the interrupt, check for status */ - inc dword ptr [esi+HALP_BIOS_FRAME_EIP] - call _HalpPushInt@0 - test eax, 0xFFFF - jz Done - - /* Update the trap frame */ - mov ebp, [esi+HALP_BIOS_FRAME_TRAP_FRAME] - mov eax, [esi+HALP_BIOS_FRAME_SS] - mov [ebp+KTRAP_FRAME_SS], eax - mov eax, [esi+HALP_BIOS_FRAME_ESP] - mov [ebp+KTRAP_FRAME_ESP], eax - mov eax, [esi+HALP_BIOS_FRAME_CS] - mov [ebp+KTRAP_FRAME_CS], eax - mov eax, [esi+HALP_BIOS_FRAME_EFLAGS] - mov [ebp+KTRAP_FRAME_EFLAGS], eax - - /* Set success code */ - mov eax, 1 - -Done: - /* Restore volatiles */ - pop ebx - pop edi - pop ebp - ret 0 - -EipLimitReached: - /* Set failure code */ - xor eax, eax - jmp Done -.endfunc - -.globl _HalpDispatchV86Opcode@0 -.func HalpDispatchV86Opcode@0 -_HalpDispatchV86Opcode@0: - - /* Make space for the HAL BIOS Frame on the stack */ - push ebp - mov ebp, esp - sub esp, HALP_BIOS_FRAME_LENGTH - - /* Save non-volatiles */ - push esi - push edi - - /* Save pointer to the trap frame */ - mov esi, [ebp] - mov [ebp-HALP_BIOS_FRAME_LENGTH+HALP_BIOS_FRAME_TRAP_FRAME], esi - - /* Save SS */ - movzx eax, word ptr [esi+KTRAP_FRAME_SS] - mov [ebp-HALP_BIOS_FRAME_LENGTH+HALP_BIOS_FRAME_SS], eax - - /* Save ESP */ - mov eax, [esi+KTRAP_FRAME_ESP] - mov [ebp-HALP_BIOS_FRAME_LENGTH+HALP_BIOS_FRAME_ESP], eax - - /* Save EFLAGS */ - mov eax, [esi+KTRAP_FRAME_EFLAGS] - mov [ebp-HALP_BIOS_FRAME_LENGTH+HALP_BIOS_FRAME_EFLAGS], eax - - /* Save CS */ - movzx eax, word ptr [esi+KTRAP_FRAME_CS] - mov [ebp-HALP_BIOS_FRAME_LENGTH+HALP_BIOS_FRAME_CS], eax - - /* Save EIP */ - mov eax, [esi+KTRAP_FRAME_EIP] - mov [ebp-HALP_BIOS_FRAME_LENGTH+HALP_BIOS_FRAME_EIP], eax - - /* No prefix */ - xor eax, eax - mov [ebp-HALP_BIOS_FRAME_LENGTH+HALP_BIOS_FRAME_PREFIX], eax - - /* Set pointer to HAL BIOS Frame */ - lea esi, [ebp-HALP_BIOS_FRAME_LENGTH] - - /* Convert CS to linear format */ - mov eax, [esi+HALP_BIOS_FRAME_CS] - shl eax, 4 - mov [esi+HALP_BIOS_FRAME_CS_BASE], eax - mov dword ptr [esi+HALP_BIOS_FRAME_CS_LIMIT], 0xFFFF - mov dword ptr [esi+HALP_BIOS_FRAME_CS_FLAGS], 0 - - /* Make sure IP is within the CS Limit */ - mov edi, [esi+HALP_BIOS_FRAME_EIP] - cmp edi, [esi+HALP_BIOS_FRAME_CS_LIMIT] - ja DispatchError - - /* Convert IP to linear address and read the opcode */ - add edi, [esi+HALP_BIOS_FRAME_CS_BASE] - mov dl, [edi] - - /* We only deal with interrupts */ - cmp dl, 0xCD - je DispatchInt - - /* Anything else is invalid */ - call _HalpOpcodeInvalid@0 - jmp DispatchError - -DispatchInt: - /* Handle dispatching the interrupt */ - call _HalpOpcodeINTnn@0 - test eax, 0xFFFF - jz DispatchReturn - - /* Update the trap frame EIP */ - mov edi, [ebp-0x20] - mov eax, [ebp-0x24] - mov [edi+KTRAP_FRAME_EIP], eax - - /* Set success code */ - mov eax, 1 - -DispatchReturn: - /* Restore registers and return */ - pop edi - pop esi - mov esp, ebp - pop ebp - ret 0 - -DispatchError: - /* Set failure code and return */ - xor eax, eax - jmp DispatchReturn -.endfunc - -.func Ki16BitStackException -_Ki16BitStackException: - - /* Save stack */ - push ss - push esp - - /* Go to kernel mode thread stack */ - mov eax, PCR[KPCR_CURRENT_THREAD] - add esp, [eax+KTHREAD_INITIAL_STACK] - - /* Switch to good stack segment */ - UNHANDLED_PATH -.endfunc - -.globl _HalpTrap0D@0 -.func HalpTrap0D@0 -TRAP_FIXUPS htd_a, htd_t, DoFixupV86, DoFixupAbios -_HalpTrap0D@0: - - /* Enter trap */ - TRAP_PROLOG htd_a, htd_t - - /* Check if this is a V86 trap */ - test dword ptr [ebp+KTRAP_FRAME_EFLAGS], EFLAGS_V86_MASK - jnz DoDispatch - - /* Unhandled */ - UNHANDLED_PATH - -DoDispatch: - /* Handle the opcode */ - call _HalpDispatchV86Opcode@0 - - /* Exit the interrupt */ - jmp _Kei386EoiHelper@0 -.endfunc - -.globl _HalpTrap06@0 -.func HalpTrap06@0 -_HalpTrap06@0: - - /* Restore DS/ES segments */ - mov eax, KGDT_R3_DATA | RPL_MASK - mov ds, ax - mov es, ax - - /* Restore ESP and return */ - mov esp, _HalpSavedEsp - ret 0 -.endfunc
Modified: branches/ros-amd64-bringup/reactos/hal/halx86/hal_generic.rbuild URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/ha... ============================================================================== --- branches/ros-amd64-bringup/reactos/hal/halx86/hal_generic.rbuild [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/hal/halx86/hal_generic.rbuild [iso-8859-1] Thu Dec 31 15:57:24 2009 @@ -21,14 +21,18 @@ <file>display.c</file> <file>halinit.c</file> <file>misc.c</file> - <file>portio.c</file> <file>profil.c</file> <file>reboot.c</file> <file>sysinfo.c</file> - <file>systimer.S</file> <file>timer.c</file> <file>usage.c</file> - <file>v86.s</file> + <if property="ARCH" value="i386"> + <directory name="i386"> + <file>portio.c</file> + <file>systimer.S</file> + <file>v86.s</file> + </directory> + </if> </directory> <directory name="include"> <pch>hal.h</pch>
Modified: branches/ros-amd64-bringup/reactos/hal/halx86/hal_generic_up.rbuild URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/ha... ============================================================================== --- branches/ros-amd64-bringup/reactos/hal/halx86/hal_generic_up.rbuild [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/hal/halx86/hal_generic_up.rbuild [iso-8859-1] Thu Dec 31 15:57:24 2009 @@ -5,7 +5,7 @@ <include>include</include> <include base="ntoskrnl">include</include> <define name="_NTHAL_" /> - <directory name="generic"> + <directory name="up"> <file>irq.S</file> <file>processor.c</file> <file>spinlock.c</file>
-
tkreuzer＠svn.reactos.org