[sir_richard] 45542: [NTOS]: Implement new and correct MiAddressToPte, ToPde, ToPdeOffset, and MiPdeToAddres and MiAddressToPte on ARM. Remove deprecated ARM page definitions. [NTOS]: Move HYPER_SPACE to 0xC0500000 since it must be on its own PDE. We need to revisit some FreeLDR Mm decisions later. [NTOS]: Move certain arch-specific definitions from mm.h to the arch-specific mm.h [NTOS]: Fix certain parts of ARM3 which made the assumption that a PDE shares the same structure as a PTE. This is tr
9 Feb
2010
9 Feb
'10
10:56 p.m.
Author: sir_richard
Date: Tue Feb 9 23:56:21 2010
New Revision: 45542
URL: http://svn.reactos.org/svn/reactos?rev=45542&view=rev
Log:
[NTOS]: Implement new and correct MiAddressToPte, ToPde, ToPdeOffset, and MiPdeToAddres
and MiAddressToPte on ARM. Remove deprecated ARM page definitions.
[NTOS]: Move HYPER_SPACE to 0xC0500000 since it must be on its own PDE. We need to revisit
some FreeLDR Mm decisions later.
[NTOS]: Move certain arch-specific definitions from mm.h to the arch-specific mm.h
[NTOS]: Fix certain parts of ARM3 which made the assumption that a PDE shares the same
structure as a PTE. This is true on all architectures except ARM. We now define a new
MMPDE type specifically for PDEs. On x86 it is defined to MMPTE with no changes.
Modified:
trunk/reactos/ntoskrnl/include/internal/arm/mm.h
trunk/reactos/ntoskrnl/include/internal/i386/mm.h
trunk/reactos/ntoskrnl/include/internal/mm.h
trunk/reactos/ntoskrnl/mm/ARM3/mdlsup.c
trunk/reactos/ntoskrnl/mm/ARM3/pagfault.c
Modified: trunk/reactos/ntoskrnl/include/internal/arm/mm.h
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/include/internal/…
==============================================================================
--- trunk/reactos/ntoskrnl/include/internal/arm/mm.h [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/include/internal/arm/mm.h [iso-8859-1] Tue Feb 9 23:56:21
2010
@@ -25,7 +25,7 @@
#define PTE_BASE 0xC0000000
#define PTE_TOP 0xC03FFFFF
#define PDE_BASE 0xC0400000
-#define HYPER_SPACE 0xC0404000
+#define HYPER_SPACE 0xC0500000
#if 0
typedef struct _HARDWARE_PDE_ARMV6
@@ -123,167 +123,39 @@
/* Easy accessing PFN in PTE */
#define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
+#define NR_SECTION_PAGE_TABLES 1024
+#define NR_SECTION_PAGE_ENTRIES 256
-#if 1
+/* See PDR definition */
+#define MI_HYPERSPACE_PTES (256 - 1)
+#define MI_ZERO_PTES (32)
+#define MI_MAPPING_RANGE_START ((ULONG)HYPER_SPACE)
+#define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \
+ MI_HYPERSPACE_PTES * PAGE_SIZE)
+#define MI_ZERO_PTE (PMMPTE)(MI_MAPPING_RANGE_END + \
+ PAGE_SIZE)
-//
-// FIXFIX: This is all wrong now!!!
-//
+/* Retrives the PDE entry for the given VA */
+#define MiGetPdeAddress(x) ((PMMPDE)(PDE_BASE + (((ULONG)(x) >> 20) << 2)))
+#define MiAddressToPde(x) MiGetPdeAddress(x)
+
+/* Retrieves the PTE entry for the given VA */
+#define MiGetPteAddress(x) ((PMMPTE)(PTE_BASE + (((ULONG)(x) >> 12) << 2)))
+#define MiAddressToPte(x) MiGetPteAddress(x)
-//
-// Take 0x80812345 and extract:
-// PTE_BASE[0x808][0x12]
-//
-#define MiGetPteAddress(x) \
- (PMMPTE)(PTE_BASE + \
- (((ULONG)(x) >> 20) << 12) + \
- ((((ULONG)(x) >> 12) & 0xFF) << 2))
+/* Retrives the PDE offset for the given VA */
+#define MiGetPdeOffset(x) (((ULONG)(x)) >> 20)
-#define MiGetPdeAddress(x) \
- (PMMPDE_HARDWARE)(PDE_BASE + \
- (((ULONG)(x) >> 20) << 2))
+/* Convert a PTE into a corresponding address */
+#define MiPteToAddress(x) ((PVOID)((ULONG)(x) << 10))
+#define MiPdeToAddress(x) ((PVOID)((ULONG)(x) << 18))
-#define MiGetPdeOffset(x) (((ULONG)(x)) >> 22)
+#define PAGE_TO_SECTION_PAGE_DIRECTORY_OFFSET(x) \
+ ((x) / (4*1024*1024))
-//
-// FIXME: THESE ARE WRONG ATM.
-//
-#define MiAddressToPde(x) \
-((PMMPTE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE))
-#define MiAddressToPte(x) \
-((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE))
-#define MiAddressToPteOffset(x) \
-((((ULONG)(x)) << 10) >> 22)
-
-
-//
-// Convert a PTE into a corresponding address
-//
-#define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10))
-
-#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
-#define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE)))
-#define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE)
-
-//
-// FIXFIX: This is all wrong now!!!
-//
-typedef union _ARM_PTE
-{
- union
- {
- struct
- {
- ULONG Type:2;
- ULONG Unused:30;
- } Fault;
- struct
- {
- ULONG Type:2;
- ULONG Ignored:2;
- ULONG Reserved:1;
- ULONG Domain:4;
- ULONG Ignored1:1;
- ULONG BaseAddress:22;
- } Coarse;
- struct
- {
- ULONG Type:2;
- ULONG Buffered:1;
- ULONG Cached:1;
- ULONG Reserved:1;
- ULONG Domain:4;
- ULONG Ignored:1;
- ULONG Access:2;
- ULONG Ignored1:8;
- ULONG BaseAddress:12;
- } Section;
- struct
- {
- ULONG Type:2;
- ULONG Reserved:3;
- ULONG Domain:4;
- ULONG Ignored:3;
- ULONG BaseAddress:20;
- } Fine;
- } L1;
- union
- {
- struct
- {
- ULONG Type:2;
- ULONG Unused:30;
- } Fault;
- struct
- {
- ULONG Type:2;
- ULONG Buffered:1;
- ULONG Cached:1;
- ULONG Access0:2;
- ULONG Access1:2;
- ULONG Access2:2;
- ULONG Access3:2;
- ULONG Ignored:4;
- ULONG BaseAddress:16;
- } Large;
- struct
- {
- ULONG Type:2;
- ULONG Buffered:1;
- ULONG Cached:1;
- ULONG Access0:2;
- ULONG Access1:2;
- ULONG Access2:2;
- ULONG Access3:2;
- ULONG BaseAddress:20;
- } Small;
- struct
- {
- ULONG Type:2;
- ULONG Buffered:1;
- ULONG Cached:1;
- ULONG Access0:2;
- ULONG Ignored:4;
- ULONG BaseAddress:22;
- } Tiny;
- } L2;
- ULONG AsUlong;
-} ARM_PTE, *PARM_PTE;
-
-typedef struct _ARM_TRANSLATION_TABLE
-{
- ARM_PTE Pte[4096];
-} ARM_TRANSLATION_TABLE, *PARM_TRANSLATION_TABLE;
-
-typedef struct _ARM_COARSE_PAGE_TABLE
-{
- ARM_PTE Pte[256];
- ULONG Padding[768];
-} ARM_COARSE_PAGE_TABLE, *PARM_COARSE_PAGE_TABLE;
-
-typedef enum _ARM_L1_PTE_TYPE
-{
- FaultPte,
- CoarsePte,
- SectionPte,
- FinePte
-} ARM_L1_PTE_TYPE;
-
-typedef enum _ARM_L2_PTE_TYPE
-{
- LargePte = 1,
- SmallPte,
- TinyPte
-} ARM_L2_PTE_TYPE;
-
-typedef enum _ARM_PTE_ACCESS
-{
- FaultAccess,
- SupervisorAccess,
- SharedAccess,
- UserAccess
-} ARM_PTE_ACCESS;
+#define PAGE_TO_SECTION_PAGE_TABLE_OFFSET(x) \
+ ((((x)) % (4*1024*1024)) / (4*1024))
+
+#define MM_CACHE_LINE_SIZE 64
#endif
-
-#endif
Modified: trunk/reactos/ntoskrnl/include/internal/i386/mm.h
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/include/internal/…
==============================================================================
--- trunk/reactos/ntoskrnl/include/internal/i386/mm.h [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/include/internal/i386/mm.h [iso-8859-1] Tue Feb 9 23:56:21
2010
@@ -59,4 +59,32 @@
#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1)
#endif
+#define PAGE_TO_SECTION_PAGE_DIRECTORY_OFFSET(x) \
+ ((x) / (4*1024*1024))
+
+#define PAGE_TO_SECTION_PAGE_TABLE_OFFSET(x) \
+ ((((x)) % (4*1024*1024)) / (4*1024))
+
+#define NR_SECTION_PAGE_TABLES 1024
+#define NR_SECTION_PAGE_ENTRIES 1024
+
+#define TEB_BASE 0x7FFDE000
+
+#define MI_HYPERSPACE_PTES (256 - 1)
+#define MI_ZERO_PTES (32)
+#define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE
+#define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \
+ MI_HYPERSPACE_PTES * PAGE_SIZE)
+#define MI_ZERO_PTE (PMMPTE)(MI_MAPPING_RANGE_END + \
+ PAGE_SIZE)
+
+/* On x86, these two are the same */
+#define MMPDE MMPTE
+#define PMMPDE PMMPTE
+
+/*
+* FIXME - different architectures have different cache line sizes...
+*/
+#define MM_CACHE_LINE_SIZE 32
+
#endif /* __NTOSKRNL_INCLUDE_INTERNAL_I386_MM_H */
Modified: trunk/reactos/ntoskrnl/include/internal/mm.h
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/include/internal/…
==============================================================================
--- trunk/reactos/ntoskrnl/include/internal/mm.h [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/include/internal/mm.h [iso-8859-1] Tue Feb 9 23:56:21 2010
@@ -108,27 +108,9 @@
/* Number of list heads to use */
#define MI_FREE_POOL_LISTS 4
-#define MI_HYPERSPACE_PTES (256 - 1)
-#define MI_ZERO_PTES (32)
-#define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE
-#define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \
- MI_HYPERSPACE_PTES * PAGE_SIZE)
-#define MI_ZERO_PTE (PMMPTE)(MI_MAPPING_RANGE_END + \
- PAGE_SIZE)
/* Signature of free pool blocks */
#define MM_FREE_POOL_TAG 'lprF'
-
-#define PAGE_TO_SECTION_PAGE_DIRECTORY_OFFSET(x) \
- ((x) / (4*1024*1024))
-
-#define PAGE_TO_SECTION_PAGE_TABLE_OFFSET(x) \
- ((((x)) % (4*1024*1024)) / (4*1024))
-
-#define NR_SECTION_PAGE_TABLES 1024
-#define NR_SECTION_PAGE_ENTRIES 1024
-
-#define TEB_BASE 0x7FFDE000
/* Although Microsoft says this isn't hardcoded anymore,
they won't be able to change it. Stuff depends on it */
@@ -168,17 +150,6 @@
* Paged and non-paged pools are 8-byte aligned
*/
#define MM_POOL_ALIGNMENT 8
-
-/*
- * Maximum size of the kmalloc area (this is totally arbitary)
- */
-#define MM_KERNEL_MAP_SIZE (16*1024*1024)
-#define MM_KERNEL_MAP_BASE (0xf0c00000)
-
-/*
- * FIXME - different architectures have different cache line sizes...
- */
-#define MM_CACHE_LINE_SIZE 32
#define MM_ROUND_UP(x,s) \
((PVOID)(((ULONG_PTR)(x)+(s)-1) & ~((ULONG_PTR)(s)-1)))
Modified: trunk/reactos/ntoskrnl/mm/ARM3/mdlsup.c
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/mm/ARM3/mdlsup.c?…
==============================================================================
--- trunk/reactos/ntoskrnl/mm/ARM3/mdlsup.c [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/mm/ARM3/mdlsup.c [iso-8859-1] Tue Feb 9 23:56:21 2010
@@ -579,7 +579,8 @@
PETHREAD Thread;
PMMSUPPORT AddressSpace;
NTSTATUS ProbeStatus;
- PMMPTE PointerPte, PointerPde, LastPte;
+ PMMPTE PointerPte, LastPte;
+ PMMPDE PointerPde;
PFN_NUMBER PageFrameIndex;
PMMPFN Pfn1;
BOOLEAN UsePfnLock;
Modified: trunk/reactos/ntoskrnl/mm/ARM3/pagfault.c
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/mm/ARM3/pagfault.…
==============================================================================
--- trunk/reactos/ntoskrnl/mm/ARM3/pagfault.c [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/mm/ARM3/pagfault.c [iso-8859-1] Tue Feb 9 23:56:21 2010
@@ -24,7 +24,7 @@
FASTCALL
MiCheckPdeForPagedPool(IN PVOID Address)
{
- PMMPTE PointerPde;
+ PMMPDE PointerPde;
NTSTATUS Status = STATUS_SUCCESS;
//
@@ -37,7 +37,7 @@
// Send a hint to the page fault handler that this is only a valid fault
// if we already detected this was access within the page table range
//
- PointerPde = MiAddressToPte(Address);
+ PointerPde = (PMMPDE)MiAddressToPte(Address);
Status = STATUS_WAIT_1;
}
else if (Address < MmSystemRangeStart)
@@ -200,7 +200,8 @@
IN PVOID TrapInformation)
{
KIRQL OldIrql = KeGetCurrentIrql(), LockIrql;
- PMMPTE PointerPde, PointerPte;
+ PMMPTE PointerPte;
+ PMMPDE PointerPde;
MMPTE TempPte;
PETHREAD CurrentThread;
NTSTATUS Status;
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