Author: cgutman Date: Fri Nov 18 18:53:41 2011 New Revision: 54418
URL: http://svn.reactos.org/svn/reactos?rev=54418&view=rev Log: [HALX86] - Do not allow software interrupts to preempt code running with interrupts disabled during KfLowerIrql
Modified: trunk/reactos/hal/halx86/up/pic.c
Modified: trunk/reactos/hal/halx86/up/pic.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/hal/halx86/up/pic.c?rev=544... ============================================================================== --- trunk/reactos/hal/halx86/up/pic.c [iso-8859-1] (original) +++ trunk/reactos/hal/halx86/up/pic.c [iso-8859-1] Fri Nov 18 18:53:41 2011 @@ -665,26 +665,30 @@
/* Set old IRQL */ Pcr->Irql = OldIrql; - - /* Check for pending software interrupts and compare with current IRQL */ - PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql]; - if (PendingIrqlMask) - { - /* Check if pending IRQL affects hardware state */ - BitScanReverse(&PendingIrql, PendingIrqlMask); - if (PendingIrql > DISPATCH_LEVEL) + + /* Make sure interrupts were enabled */ + if (EFlags & EFLAGS_INTERRUPT_MASK) + { + /* Check for pending software interrupts and compare with current IRQL */ + PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql]; + if (PendingIrqlMask) { - /* Set new PIC mask */ - Mask.Both = Pcr->IDR; - __outbyte(PIC1_DATA_PORT, Mask.Master); - __outbyte(PIC2_DATA_PORT, Mask.Slave); - - /* Clear IRR bit */ - Pcr->IRR ^= (1 << PendingIrql); + /* Check if pending IRQL affects hardware state */ + BitScanReverse(&PendingIrql, PendingIrqlMask); + if (PendingIrql > DISPATCH_LEVEL) + { + /* Set new PIC mask */ + Mask.Both = Pcr->IDR; + __outbyte(PIC1_DATA_PORT, Mask.Master); + __outbyte(PIC2_DATA_PORT, Mask.Slave); + + /* Clear IRR bit */ + Pcr->IRR ^= (1 << PendingIrql); + } + + /* Now handle pending interrupt */ + SWInterruptHandlerTable[PendingIrql](); } - - /* Now handle pending interrupt */ - SWInterruptHandlerTable[PendingIrql](); }
/* Restore interrupt state */