[tkreuzer] 48318: [FREELDR] - Move all 16 bit code to .text16 section - Fix linking issues with x86_16_SwitchToLong, by using a relative call - Align pagetables by page size - Add mainCRTStartup entry point freeldr now starts again
Author: tkreuzer Date: Tue Jul 27 21:49:19 2010 New Revision: 48318
URL: http://svn.reactos.org/svn/reactos?rev=48318&view=rev Log: [FREELDR] - Move all 16 bit code to .text16 section - Fix linking issues with x86_16_SwitchToLong, by using a relative call - Align pagetables by page size - Add mainCRTStartup entry point freeldr now starts again
Modified: branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/arch.S branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/fathelp.S branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/i386pnp.S branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/int386.S branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/mb.S branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/freeldr.rbuild branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/freeldr_amd64.lnk
Modified: branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/arch.S URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/boot/f... ============================================================================== --- branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/arch.S [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/arch.S [iso-8859-1] Tue Jul 27 21:49:19 2010 @@ -1,11 +1,10 @@ .intel_syntax noprefix -.text -.code16
#define ASM #include <arch.h>
-//.org 0x8000 +.code16 +.section .text16, "x"
.global RealEntryPoint RealEntryPoint: @@ -284,6 +283,7 @@ jmp LMODE_CS:offset LongCat //Load CS with 64 bit segment and flush the instruction cache
.code64 +.text LongCat: /* Set up 64 bit stack */ mov rsp, stack64 @@ -378,6 +378,7 @@
/** Some data *****************************************************************/
+.text .code64
stack16: @@ -449,6 +450,6 @@ /* Need to include them here, because of linking issues between 64 / 16 bit */ //#include "debug16.S" #include "int386.S" -#include "boot.S" +//#include "boot.S" #include "i386pnp.S"
Modified: branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/fathelp.S URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/boot/f... ============================================================================== --- branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/fathelp.S [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/fathelp.S [iso-8859-1] Tue Jul 27 21:49:19 2010 @@ -4,9 +4,8 @@
.intel_syntax noprefix
-.text - .code16 +.section .text16, "x"
#define BootSectorStackTop 0x7bf2 #define DataAreaStartHigh 0x2 @@ -48,13 +47,14 @@ // encode a jmp instruction to jump to 0000:8200 //.org 0x8000
-.global _mainCRTStartup // For Mingw32 builds where the linker looks for this symbol -_mainCRTStartup: +.global mainCRTStartup // For Mingw32 builds where the linker looks for this symbol +mainCRTStartup: .global start start: - .byte 0xe9 - .byte 0xfd - .byte 0x01 + jmp RealEntryPoint +// .byte 0xe9 +// .byte 0xfd +// .byte 0x01
// Now starts the extra boot code that we will store // in the first 512 bytes of freeldr.sys. This code @@ -67,7 +67,7 @@
push ax // First save AX - the start cluster of freeldr.sys
- +#if 0 // Display "Loading FreeLoader..." message mov esi, offset msgLoading // Loading message call [bp-PutCharsOffset] // Display it @@ -117,15 +117,17 @@ pop es
jmp LoadFile // Load the next cluster (if any) - +#endif LoadFile_Done: mov dl, [bp+BootDrive] // Load the boot drive into DL mov dh, BootPartition // Load the boot partition into DH - push word ptr 0x0000 - push word ptr 0x8000 // We will do a far return to 0000:8000h - -// retf // Transfer control to ROSLDR - .byte 0xcb // == retf + + push 0 // push segment (0x0000) + mov bx, [0x8000 + 0xA8] // load the RVA of the EntryPoint into eax + add bx, 0x8000 // RVA -> VA and skip 3 bytes (jump to fathelper code) + push bx // push offset +// retf // Transfer control to FreeLoader + .byte 0xcb // == retf
// Reads the entire FAT into memory at 7000:0000 @@ -224,7 +226,8 @@ ret
- +.text +.code64 msgLoading: .ascii "Loading FreeLoader..." .byte 0x0d,0x0a,0
Modified: branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/i386pnp.S URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/boot/f... ============================================================================== --- branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/i386pnp.S [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/i386pnp.S [iso-8859-1] Tue Jul 27 21:49:19 2010 @@ -17,13 +17,11 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */
- .text - .code16 - #define ASM - #include <arch.h>
+.code64 +.text
/* * U32 PnpBiosSupported(VOID); @@ -144,7 +142,7 @@ movzx ecx, ax mov _pnp_result, ecx
- call x86_16_SwitchToLong + call [x86_16_SwitchToLong_ptr] .code64
mov esi, [rbp + 0x08] @@ -236,7 +234,7 @@ movzx ecx, ax mov _pnp_result, ecx
- call x86_16_SwitchToLong + call [x86_16_SwitchToLong_ptr] .code64
/* update node number */ @@ -255,4 +253,7 @@
ret
+x86_16_SwitchToLong_ptr: + .quad x86_16_SwitchToLong + /* EOF */
Modified: branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/int386.S URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/boot/f... ============================================================================== --- branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/int386.S [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/int386.S [iso-8859-1] Tue Jul 27 21:49:19 2010 @@ -17,13 +17,13 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */
- .intel_syntax noprefix - .text - .code16 +.intel_syntax noprefix
#define ASM #include <arch.h>
+.code64 +.text
Int386_REGS:
@@ -59,6 +59,10 @@ .quad 0 Int386_regsout: .quad 0 + + +.code16 +.section .text16, "x"
/* * int Int386(int ivec, REGS* in, REGS* out);
Modified: branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/mb.S URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/boot/f... ============================================================================== --- branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/mb.S [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/arch/amd64/mb.S [iso-8859-1] Tue Jul 27 21:49:19 2010 @@ -49,7 +49,8 @@ .byte 0 .endr
-.bss +.text +.align 4096 PageDirectoryStart: pml4_startup: .fill 4096, 1, 0
Modified: branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/freeldr.rbuild URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/boot/f... ============================================================================== --- branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/freeldr.rbuild [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/freeldr.rbuild [iso-8859-1] Tue Jul 27 21:49:19 2010 @@ -17,7 +17,7 @@ </if>
<ifnot property="ARCH" value="powerpc"> - <module name="freeldr" type="bootloader" baseaddress="$(BASEADDRESS_FREELDR)"> + <module name="freeldr" type="bootloader" baseaddress="$(BASEADDRESS_FREELDR)" entrypoint="mainCRTStartup"> <linkerscript>freeldr_$(ARCH).lnk</linkerscript> <bootstrap installbase="loader" /> <library>freeldr_startup</library>
Modified: branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/freeldr_amd64.lnk URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/boot/f... ============================================================================== --- branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/freeldr_amd64.lnk [iso-8859-1] (original) +++ branches/ros-amd64-bringup/reactos/boot/freeldr/freeldr/freeldr_amd64.lnk [iso-8859-1] Tue Jul 27 21:49:19 2010 @@ -2,7 +2,13 @@ ENTRY(_mainCRTStartup) SECTIONS { - .text __image_base__ + __section_alignment__ : + .text16 __image_base__ + __section_alignment__ : + { + __text16_start__ = . ; + *(.text16) + __text16_end__ = . ; + } + .text BLOCK(__section_alignment__) : { __text_start__ = .; *(.init) @@ -19,12 +25,6 @@ *(.gcc_exc) __text_end__ = .; *(.gcc_except_table) - } - init BLOCK(__section_alignment__) : - { - __init_start__ = . ; - *(init) - __init_end__ = . ; } .data BLOCK(__section_alignment__) : { @@ -44,14 +44,6 @@ *(SORT(.rdata$*)) *(.eh_frame) } - .stab BLOCK(__section_alignment__) (NOLOAD) : - { - [ .stab ] - } - .stabstr BLOCK(__section_alignment__) (NOLOAD) : - { - [ .stabstr ] - }
}
-
tkreuzer＠svn.reactos.org