[sir_richard] 45480: [NTOS]: Add a branch-to-self to start testing kernel code. [ARMLLB]: Fix incorrect frame buffer size calculation. [FREELDR]: Finish paging setup. Now we're able to boot to the kernel entrypoint at 0x808D3000, but I'm not happy with the memory descriptors.
Author: sir_richard Date: Sun Feb 7 04:01:19 2010 New Revision: 45480
URL: http://svn.reactos.org/svn/reactos?rev=45480&view=rev Log: [NTOS]: Add a branch-to-self to start testing kernel code. [ARMLLB]: Fix incorrect frame buffer size calculation. [FREELDR]: Finish paging setup. Now we're able to boot to the kernel entrypoint at 0x808D3000, but I'm not happy with the memory descriptors.
Modified: trunk/reactos/boot/armllb/hw/versatile/hwinfo.c trunk/reactos/boot/freeldr/freeldr/arch/arm/loader.c trunk/reactos/ntoskrnl/include/internal/arm/mm.h trunk/reactos/ntoskrnl/ke/arm/boot.s
Modified: trunk/reactos/boot/armllb/hw/versatile/hwinfo.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/boot/armllb/hw/versatile/hw... ============================================================================== --- trunk/reactos/boot/armllb/hw/versatile/hwinfo.c [iso-8859-1] (original) +++ trunk/reactos/boot/armllb/hw/versatile/hwinfo.c [iso-8859-1] Sun Feb 7 04:01:19 2010 @@ -47,8 +47,8 @@ // 0x00000200 - 0x0000FFFF ARM STACK [ 62 KB] // 0x00010000 - 0x0001FFFF ARM LLB [ 64 KB] // 0x00020000 - 0x0009FFFF ARM OS LOADER [512 KB] -// 0x000A0000 - 0x000FFFFF ARM FRAMEBUFFER [384 KB] -// 0x00100000 - 0x007FFFFF OS LOADER FREE/UNUSED [ 7 MB] +// 0x000A0000 - 0x0013FFFF ARM FRAMEBUFFER [640 KB] +// 0x00140000 - 0x007FFFFF OS LOADER FREE/UNUSED [ 6 MB] // 0x00800000 - 0x017FFFFF KERNEL, HAL, INITIAL DRIVER LOAD ADDR [ 16 MB] // 0x01800000 - 0x037FFFFF RAM DISK [ 32 MB] // 0x03800000 - 0x07FFFFFF FREE RAM [ 72 MB] @@ -61,8 +61,8 @@ {0x00000200, 0x0000FE00, BiosMemoryBootStrap, 0}, {0x00010000, 0x00010000, BiosMemoryBootStrap, 0}, {0x00020000, 0x00080000, BiosMemoryBootLoader, 0}, - {0x000A0000, 0x00060000, BiosMemoryBootLoader, 0}, - {0x00100000, 0x01700000, BiosMemoryUsable, 0}, + {0x000A0000, 0x000A0000, BiosMemoryBootLoader, 0}, + {0x00140000, 0x016C0000, BiosMemoryUsable, 0}, {0x01800000, 0x02000000, BiosMemoryReserved, 0}, {0x10000000, 0x10000000, BiosMemoryReserved, 0}, {0, 0, 0, 0}
Modified: trunk/reactos/boot/freeldr/freeldr/arch/arm/loader.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/boot/freeldr/freeldr/arch/a... ============================================================================== --- trunk/reactos/boot/freeldr/freeldr/arch/arm/loader.c [iso-8859-1] (original) +++ trunk/reactos/boot/freeldr/freeldr/arch/arm/loader.c [iso-8859-1] Sun Feb 7 04:01:19 2010 @@ -719,12 +719,9 @@
/* Get the Kernel Table Index */ KernelPageTableIndex = KernelBase >> PDE_SHIFT; - printf("Kernel Base: 0x%p (PDE Index: %lx)\n", KernelBase, KernelPageTableIndex); - - /* Allocate 1MB PDE_BASE and HYPER_SPACE. This will be improved later. Must be 1MB aligned */ + + /* Allocate 1MB PDE_BASE and HYPER_SPACE. This will be improved later. Must be 1MB aligned */ PageDir = MmAllocateMemoryAtAddress(1 * 1024 * 1024, (PVOID)0x700000, LoaderMemoryData); - if (!PageDir) { printf("FATAL: No memory!\n"); while (TRUE); } - printf("Initial Page Directory: 0x%p\n", PageDir);
/* Setup the Low Memory PDE as an identity-mapped Large Page (1MB) */ LargePte = &PageDir->Pte[LowMemPageTableIndex]; @@ -741,31 +738,35 @@
/* Allocate 8 page tables (8KB) to describe the 8MB initial kernel region */ KernelPageTable = MmAllocateMemoryWithType(8192, LoaderMemoryData); - if (!KernelPageTable) { printf("FATAL: No memory!\n"); while (TRUE); } - printf("Kernel Page Tables: 0x%p\n", KernelPageTable);
/* Setup the Kernel PDEs */ PointerPde = &PageDir->Pde[KernelPageTableIndex]; Pfn = PaPtrToPdePfn(KernelPageTable); for (i = 0; i < 8; i++) { - TempPde.PageFrameNumber = Pfn++; + TempPde.PageFrameNumber = Pfn; *PointerPde++ = TempPde; - } - + Pfn++; + } + + /* Setup the Kernel PTEs */ + PointerPte = KernelPageTable->Pte; + Pfn = PaPtrToPfn(KERNEL_BASE_PHYS); + for (i = 0; i < 1536; i++) + { + TempPte.PageFrameNumber = Pfn++; + *PointerPte++ = TempPte; + } + /* Setup the Startup PDE */ - printf("PAGEDIR: %p IDX: %lx PPDE: %p PFN: %lx \n", PageDir, StartupPdePageTableIndex, &PageDir->Pte[StartupPdePageTableIndex], PaToLargePfn((ULONG_PTR)PageDir)); LargePte = &PageDir->Pte[StartupPdePageTableIndex]; TempLargePte.PageFrameNumber = PaToLargePfn((ULONG_PTR)PageDir); - printf("PAGEDIR: %p IDX: %lx PPDE: %p PFN: %lx \n", PageDir, StartupPdePageTableIndex, LargePte, TempLargePte.PageFrameNumber); *LargePte = TempLargePte;
/* After this point, any MiAddressToPde is guaranteed not to fault */
/* Allocate 4 page tables (4KB) to describe the 4MB PTE_BASE region */ PageTable = MmAllocateMemoryWithType(4096, LoaderMemoryData); - if (!PageTable) { printf("FATAL: No memory!\n"); while (TRUE); } - printf("Initial Page Tables: 0x%p\n", PageTable);
/* * Link them in the Startup PDE. @@ -794,7 +795,6 @@ * and mapped in the PTE_BASE first, then the page table itself will be * editable through its flat PTE address. */ - printf("Paging init done\n"); return PageDir; }
@@ -825,8 +825,6 @@ KeArmControlRegisterSet(ControlRegister); /* Jump to Kernel */ - TuiPrintf("Hello from MMU Enabled!\n"); - while (TRUE); (*KernelEntryPoint)((PVOID)((ULONG_PTR)ArmLoaderBlock | KSEG0_BASE)); }
Modified: trunk/reactos/ntoskrnl/include/internal/arm/mm.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/include/internal/a... ============================================================================== --- trunk/reactos/ntoskrnl/include/internal/arm/mm.h [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/include/internal/arm/mm.h [iso-8859-1] Sun Feb 7 04:01:19 2010 @@ -65,8 +65,8 @@ ULONG Valid:1; ULONG Buffered:1; ULONG Cached:1; + ULONG Accessed:1; ULONG Owner:1; - ULONG Accessed:1; ULONG CacheAttributes:3; ULONG ReadOnly:1; ULONG Shared:1; @@ -103,173 +103,6 @@ InvalidDomain, ManagerDomain } ARM_DOMAIN; - -// -// FIXFIX: This is all wrong now!!! -// -typedef union _ARM_PTE -{ - union - { - struct - { - ULONG Type:2; - ULONG Unused:30; - } Fault; - struct - { - ULONG Type:2; - ULONG Ignored:2; - ULONG Reserved:1; - ULONG Domain:4; - ULONG Ignored1:1; - ULONG BaseAddress:22; - } Coarse; - struct - { - ULONG Type:2; - ULONG Buffered:1; - ULONG Cached:1; - ULONG Reserved:1; - ULONG Domain:4; - ULONG Ignored:1; - ULONG Access:2; - ULONG Ignored1:8; - ULONG BaseAddress:12; - } Section; - struct - { - ULONG Type:2; - ULONG Reserved:3; - ULONG Domain:4; - ULONG Ignored:3; - ULONG BaseAddress:20; - } Fine; - } L1; - union - { - struct - { - ULONG Type:2; - ULONG Unused:30; - } Fault; - struct - { - ULONG Type:2; - ULONG Buffered:1; - ULONG Cached:1; - ULONG Access0:2; - ULONG Access1:2; - ULONG Access2:2; - ULONG Access3:2; - ULONG Ignored:4; - ULONG BaseAddress:16; - } Large; - struct - { - ULONG Type:2; - ULONG Buffered:1; - ULONG Cached:1; - ULONG Access0:2; - ULONG Access1:2; - ULONG Access2:2; - ULONG Access3:2; - ULONG BaseAddress:20; - } Small; - struct - { - ULONG Type:2; - ULONG Buffered:1; - ULONG Cached:1; - ULONG Access0:2; - ULONG Ignored:4; - ULONG BaseAddress:22; - } Tiny; - } L2; - ULONG AsUlong; -} ARM_PTE, *PARM_PTE; - -typedef struct _ARM_TRANSLATION_TABLE -{ - ARM_PTE Pte[4096]; -} ARM_TRANSLATION_TABLE, *PARM_TRANSLATION_TABLE; - -typedef struct _ARM_COARSE_PAGE_TABLE -{ - ARM_PTE Pte[256]; - ULONG Padding[768]; -} ARM_COARSE_PAGE_TABLE, *PARM_COARSE_PAGE_TABLE; - -typedef enum _ARM_L1_PTE_TYPE -{ - FaultPte, - CoarsePte, - SectionPte, - FinePte -} ARM_L1_PTE_TYPE; - -typedef enum _ARM_L2_PTE_TYPE -{ - LargePte = 1, - SmallPte, - TinyPte -} ARM_L2_PTE_TYPE; - -typedef enum _ARM_PTE_ACCESS -{ - FaultAccess, - SupervisorAccess, - SharedAccess, - UserAccess -} ARM_PTE_ACCESS; - -#if 0 - -// -// FIXFIX: This is all wrong now!!! -// - -// -// Take 0x80812345 and extract: -// PTE_BASE[0x808][0x12] -// -#define MiGetPteAddress(x) \ - (PMMPTE)(PTE_BASE + \ - (((ULONG)(x) >> 20) << 12) + \ - ((((ULONG)(x) >> 12) & 0xFF) << 2)) - -#define MiGetPdeAddress(x) \ - (PMMPDE_HARDWARE)(PDE_BASE + \ - (((ULONG)(x) >> 20) << 2)) - -#define MiGetPdeOffset(x) (((ULONG)(x)) >> 22) - -#define PTE_BASE 0xC0000000 -#define PTE_TOP 0xC03FFFFF -#define PDE_BASE 0xC1000000 -#define HYPER_SPACE 0xC1100000 - -// -// FIXME: THESE ARE WRONG ATM. -// -#define MiAddressToPde(x) \ -((PMMPTE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE)) -#define MiAddressToPte(x) \ -((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE)) -#define MiAddressToPteOffset(x) \ -((((ULONG)(x)) << 10) >> 22) - - -// -// Convert a PTE into a corresponding address -// -#define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10)) - -#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE)) -#define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE))) -#define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE) - -#endif
struct _EPROCESS; PULONG MmGetPageDirectory(VOID); @@ -288,4 +121,167 @@ /* Easy accessing PFN in PTE */ #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
+ +#if 1 + +// +// FIXFIX: This is all wrong now!!! +// + +// +// Take 0x80812345 and extract: +// PTE_BASE[0x808][0x12] +// +#define MiGetPteAddress(x) \ + (PMMPTE)(PTE_BASE + \ + (((ULONG)(x) >> 20) << 12) + \ + ((((ULONG)(x) >> 12) & 0xFF) << 2)) + +#define MiGetPdeAddress(x) \ + (PMMPDE_HARDWARE)(PDE_BASE + \ + (((ULONG)(x) >> 20) << 2)) + +#define MiGetPdeOffset(x) (((ULONG)(x)) >> 22) + +// +// FIXME: THESE ARE WRONG ATM. +// +#define MiAddressToPde(x) \ +((PMMPTE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE)) +#define MiAddressToPte(x) \ +((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE)) +#define MiAddressToPteOffset(x) \ +((((ULONG)(x)) << 10) >> 22) + + +// +// Convert a PTE into a corresponding address +// +#define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10)) + +#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE)) +#define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE))) +#define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE) + +// +// FIXFIX: This is all wrong now!!! +// +typedef union _ARM_PTE +{ + union + { + struct + { + ULONG Type:2; + ULONG Unused:30; + } Fault; + struct + { + ULONG Type:2; + ULONG Ignored:2; + ULONG Reserved:1; + ULONG Domain:4; + ULONG Ignored1:1; + ULONG BaseAddress:22; + } Coarse; + struct + { + ULONG Type:2; + ULONG Buffered:1; + ULONG Cached:1; + ULONG Reserved:1; + ULONG Domain:4; + ULONG Ignored:1; + ULONG Access:2; + ULONG Ignored1:8; + ULONG BaseAddress:12; + } Section; + struct + { + ULONG Type:2; + ULONG Reserved:3; + ULONG Domain:4; + ULONG Ignored:3; + ULONG BaseAddress:20; + } Fine; + } L1; + union + { + struct + { + ULONG Type:2; + ULONG Unused:30; + } Fault; + struct + { + ULONG Type:2; + ULONG Buffered:1; + ULONG Cached:1; + ULONG Access0:2; + ULONG Access1:2; + ULONG Access2:2; + ULONG Access3:2; + ULONG Ignored:4; + ULONG BaseAddress:16; + } Large; + struct + { + ULONG Type:2; + ULONG Buffered:1; + ULONG Cached:1; + ULONG Access0:2; + ULONG Access1:2; + ULONG Access2:2; + ULONG Access3:2; + ULONG BaseAddress:20; + } Small; + struct + { + ULONG Type:2; + ULONG Buffered:1; + ULONG Cached:1; + ULONG Access0:2; + ULONG Ignored:4; + ULONG BaseAddress:22; + } Tiny; + } L2; + ULONG AsUlong; +} ARM_PTE, *PARM_PTE; + +typedef struct _ARM_TRANSLATION_TABLE +{ + ARM_PTE Pte[4096]; +} ARM_TRANSLATION_TABLE, *PARM_TRANSLATION_TABLE; + +typedef struct _ARM_COARSE_PAGE_TABLE +{ + ARM_PTE Pte[256]; + ULONG Padding[768]; +} ARM_COARSE_PAGE_TABLE, *PARM_COARSE_PAGE_TABLE; + +typedef enum _ARM_L1_PTE_TYPE +{ + FaultPte, + CoarsePte, + SectionPte, + FinePte +} ARM_L1_PTE_TYPE; + +typedef enum _ARM_L2_PTE_TYPE +{ + LargePte = 1, + SmallPte, + TinyPte +} ARM_L2_PTE_TYPE; + +typedef enum _ARM_PTE_ACCESS +{ + FaultAccess, + SupervisorAccess, + SharedAccess, + UserAccess +} ARM_PTE_ACCESS; + #endif + +#endif
Modified: trunk/reactos/ntoskrnl/ke/arm/boot.s URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/boot.s?rev=... ============================================================================== --- trunk/reactos/ntoskrnl/ke/arm/boot.s [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/ke/arm/boot.s [iso-8859-1] Sun Feb 7 04:01:19 2010 @@ -17,6 +17,7 @@ // // Put us in FIQ mode // + b . mrs r3, cpsr orr r3, r1, #CPSR_FIQ_MODE msr cpsr, r3
-
sir_richard＠svn.reactos.org