[tkreuzer] 55472: [NTOSKRNL] - Implement MiIsUserP*e inline functions to efficiently determine if a pte is a pte/pde/ppe or pxe for a user mode page - Make MiDetermineUserGlobalPteMask work for _MI...

Author: tkreuzer
Date: Mon Feb  6 22:01:09 2012
New Revision: 55472

URL: http://svn.reactos.org/svn/reactos?rev=55472&view=rev
Log:
[NTOSKRNL]
- Implement MiIsUserP*e inline functions to efficiently determine if a pte is a
pte/pde/ppe or pxe for a user mode page
- Make MiDetermineUserGlobalPteMask work for _MI_PAGING_LEVELS >= 3
- In MiResolveDemandZeroFault, use MI_MAKE_HARDWARE_PTE only, it does all the necessary
work.

Modified:
    trunk/reactos/ntoskrnl/mm/ARM3/miarm.h
    trunk/reactos/ntoskrnl/mm/ARM3/pagfault.c

Modified: trunk/reactos/ntoskrnl/mm/ARM3/miarm.h
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/mm/ARM3/miarm.h?r…
==============================================================================
--- trunk/reactos/ntoskrnl/mm/ARM3/miarm.h [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/mm/ARM3/miarm.h [iso-8859-1] Mon Feb  6 22:01:09 2012
@@ -565,6 +565,50 @@
             (MemoryType == LoaderBBTMemory));
 }
 
+#ifdef _M_AMD64
+BOOLEAN
+FORCEINLINE
+MiIsUserPxe(PVOID Address)
+{
+    return ((ULONG_PTR)Address >> 7) == 0x1FFFFEDF6FB7DA0ULL;
+}
+
+BOOLEAN
+FORCEINLINE
+MiIsUserPpe(PVOID Address)
+{
+    return ((ULONG_PTR)Address >> 16) == 0xFFFFF6FB7DA0ULL;
+}
+
+BOOLEAN
+FORCEINLINE
+MiIsUserPde(PVOID Address)
+{
+    return ((ULONG_PTR)Address >> 25) == 0x7FFFFB7DA0ULL;
+}
+
+BOOLEAN
+FORCEINLINE
+MiIsUserPte(PVOID Address)
+{
+    return ((ULONG_PTR)Address >> 34) == 0x3FFFFDA0ULL;
+}
+#else
+BOOLEAN
+FORCEINLINE
+MiIsUserPde(PVOID Address)
+{
+    return ((Address >= (PVOID)MiAddressToPde(NULL)) &&
+            (Address <= (PVOID)MiHighestUserPde));
+}
+
+BOOLEAN
+FORCEINLINE
+MiIsUserPte(PVOID Address)
+{
+    return (Address <= (PVOID)MiHighestUserPte);
+}
+#endif
 
 //
 // Figures out the hardware bits for a PTE
@@ -583,9 +627,15 @@
     MI_MAKE_ACCESSED_PAGE(&TempPte);
 
     /* Is this for user-mode? */
-    if ((PointerPte <= (PVOID)MiHighestUserPte) ||
-        ((PointerPte >= (PVOID)MiAddressToPde(NULL)) &&
-         (PointerPte <= (PVOID)MiHighestUserPde)))
+    if (
+#if (_MI_PAGING_LEVELS == 4)
+        MiIsUserPxe(PointerPte) ||
+#endif
+#if (_MI_PAGING_LEVELS >= 3)
+        MiIsUserPpe(PointerPte) ||
+#endif
+        MiIsUserPde(PointerPte) ||
+        MiIsUserPte(PointerPte))
     {
         /* Set the owner bit */
         MI_MAKE_OWNER_PAGE(&TempPte);

Modified: trunk/reactos/ntoskrnl/mm/ARM3/pagfault.c
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/mm/ARM3/pagfault.…
==============================================================================
--- trunk/reactos/ntoskrnl/mm/ARM3/pagfault.c [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/mm/ARM3/pagfault.c [iso-8859-1] Mon Feb  6 22:01:09 2012
@@ -335,22 +335,10 @@
     if (NeedZero) MiZeroPfn(PageFrameNumber);
 
     /* Build the PTE */
-    if (PointerPte <= MiHighestUserPte)
-    {
-        /* For user mode */
-        MI_MAKE_HARDWARE_PTE_USER(&TempPte,
-                                  PointerPte,
-                                  Protection,
-                                  PageFrameNumber);
-    }
-    else
-    {
-        /* For kernel mode */
-        MI_MAKE_HARDWARE_PTE(&TempPte,
-                             PointerPte,
-                             Protection,
-                             PageFrameNumber);
-    }
+    MI_MAKE_HARDWARE_PTE(&TempPte,
+                         PointerPte,
+                         Protection,
+                         PageFrameNumber);
 
     /* Set it dirty if it's a writable page */
     if (MI_IS_PAGE_WRITEABLE(&TempPte)) MI_MAKE_DIRTY_PAGE(&TempPte);
@@ -625,6 +613,7 @@
     /* Check if the PTE is completely empty */
     if (TempPte.u.Long == 0)
     {
+        /* The address is not from any pageable area! */
         KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA,
                      (ULONG_PTR)Address,
                      StoreInstruction,