[hbelusca] 72049: [XDK] - Move the PCI_COMMON_HEADER_LAYOUT next to the structures that use it. - Add IRP flags description comments.
Author: hbelusca Date: Fri Jul 29 13:17:58 2016 New Revision: 72049
URL: http://svn.reactos.org/svn/reactos?rev=72049&view=rev Log: [XDK] - Move the PCI_COMMON_HEADER_LAYOUT next to the structures that use it. - Add IRP flags description comments.
Modified: trunk/reactos/sdk/include/xdk/iotypes.h
Modified: trunk/reactos/sdk/include/xdk/iotypes.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/sdk/include/xdk/iotypes.h?r... ============================================================================== --- trunk/reactos/sdk/include/xdk/iotypes.h [iso-8859-1] (original) +++ trunk/reactos/sdk/include/xdk/iotypes.h [iso-8859-1] Fri Jul 29 13:17:58 2016 @@ -498,80 +498,6 @@ ULONG SharedDelete; } SHARE_ACCESS, *PSHARE_ACCESS;
-/* While MS WDK uses inheritance in C++, we cannot do this with gcc, as - inheritance, even from a struct renders the type non-POD. So we use - this hack */ -#define PCI_COMMON_HEADER_LAYOUT \ - USHORT VendorID; \ - USHORT DeviceID; \ - USHORT Command; \ - USHORT Status; \ - UCHAR RevisionID; \ - UCHAR ProgIf; \ - UCHAR SubClass; \ - UCHAR BaseClass; \ - UCHAR CacheLineSize; \ - UCHAR LatencyTimer; \ - UCHAR HeaderType; \ - UCHAR BIST; \ - union { \ - struct _PCI_HEADER_TYPE_0 { \ - ULONG BaseAddresses[PCI_TYPE0_ADDRESSES]; \ - ULONG CIS; \ - USHORT SubVendorID; \ - USHORT SubSystemID; \ - ULONG ROMBaseAddress; \ - UCHAR CapabilitiesPtr; \ - UCHAR Reserved1[3]; \ - ULONG Reserved2; \ - UCHAR InterruptLine; \ - UCHAR InterruptPin; \ - UCHAR MinimumGrant; \ - UCHAR MaximumLatency; \ - } type0; \ - struct _PCI_HEADER_TYPE_1 { \ - ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; \ - UCHAR PrimaryBus; \ - UCHAR SecondaryBus; \ - UCHAR SubordinateBus; \ - UCHAR SecondaryLatency; \ - UCHAR IOBase; \ - UCHAR IOLimit; \ - USHORT SecondaryStatus; \ - USHORT MemoryBase; \ - USHORT MemoryLimit; \ - USHORT PrefetchBase; \ - USHORT PrefetchLimit; \ - ULONG PrefetchBaseUpper32; \ - ULONG PrefetchLimitUpper32; \ - USHORT IOBaseUpper16; \ - USHORT IOLimitUpper16; \ - UCHAR CapabilitiesPtr; \ - UCHAR Reserved1[3]; \ - ULONG ROMBaseAddress; \ - UCHAR InterruptLine; \ - UCHAR InterruptPin; \ - USHORT BridgeControl; \ - } type1; \ - struct _PCI_HEADER_TYPE_2 { \ - ULONG SocketRegistersBaseAddress; \ - UCHAR CapabilitiesPtr; \ - UCHAR Reserved; \ - USHORT SecondaryStatus; \ - UCHAR PrimaryBus; \ - UCHAR SecondaryBus; \ - UCHAR SubordinateBus; \ - UCHAR SecondaryLatency; \ - struct { \ - ULONG Base; \ - ULONG Limit; \ - } Range[PCI_TYPE2_ADDRESSES-1]; \ - UCHAR InterruptLine; \ - UCHAR InterruptPin; \ - USHORT BridgeControl; \ - } type2; \ - } u; - typedef enum _CREATE_FILE_TYPE { CreateFileTypeNone, CreateFileTypeNamedPipe, @@ -1836,7 +1762,7 @@ #define VPB_RAW_MOUNT 0x0010 #define VPB_DIRECT_WRITES_ALLOWED 0x0020
-/* IRP.Flags */ +/* IO_STACK_LOCATION.Flags */
#define SL_FORCE_ACCESS_CHECK 0x01 #define SL_OPEN_PAGING_FILE 0x02 @@ -1876,6 +1802,8 @@
$endif (_WDMDDK_ || _DEVIOCTL_) $if (_WDMDDK_) + +/* IRP.Flags */ #define IRP_NOCACHE 0x00000001 #define IRP_PAGING_IO 0x00000002 #define IRP_MOUNT_COMPLETION 0x00000002 @@ -1896,6 +1824,7 @@ #define IRP_RETRY_IO_COMPLETION 0x00004000 #define IRP_CLASS_CACHE_OPERATION 0x00008000
+/* IRP.AllocationFlags */ #define IRP_QUOTA_CHARGED 0x01 #define IRP_ALLOCATED_MUST_SUCCEED 0x02 #define IRP_ALLOCATED_FIXED_SIZE 0x04 @@ -3181,6 +3110,80 @@ #define PCI_TYPE1_ADDRESSES 2 #define PCI_TYPE2_ADDRESSES 5
+/* While MS WDK uses inheritance in C++, we cannot do this with gcc, as + inheritance, even from a struct renders the type non-POD. So we use + this hack */ +#define PCI_COMMON_HEADER_LAYOUT \ + USHORT VendorID; \ + USHORT DeviceID; \ + USHORT Command; \ + USHORT Status; \ + UCHAR RevisionID; \ + UCHAR ProgIf; \ + UCHAR SubClass; \ + UCHAR BaseClass; \ + UCHAR CacheLineSize; \ + UCHAR LatencyTimer; \ + UCHAR HeaderType; \ + UCHAR BIST; \ + union { \ + struct _PCI_HEADER_TYPE_0 { \ + ULONG BaseAddresses[PCI_TYPE0_ADDRESSES]; \ + ULONG CIS; \ + USHORT SubVendorID; \ + USHORT SubSystemID; \ + ULONG ROMBaseAddress; \ + UCHAR CapabilitiesPtr; \ + UCHAR Reserved1[3]; \ + ULONG Reserved2; \ + UCHAR InterruptLine; \ + UCHAR InterruptPin; \ + UCHAR MinimumGrant; \ + UCHAR MaximumLatency; \ + } type0; \ + struct _PCI_HEADER_TYPE_1 { \ + ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; \ + UCHAR PrimaryBus; \ + UCHAR SecondaryBus; \ + UCHAR SubordinateBus; \ + UCHAR SecondaryLatency; \ + UCHAR IOBase; \ + UCHAR IOLimit; \ + USHORT SecondaryStatus; \ + USHORT MemoryBase; \ + USHORT MemoryLimit; \ + USHORT PrefetchBase; \ + USHORT PrefetchLimit; \ + ULONG PrefetchBaseUpper32; \ + ULONG PrefetchLimitUpper32; \ + USHORT IOBaseUpper16; \ + USHORT IOLimitUpper16; \ + UCHAR CapabilitiesPtr; \ + UCHAR Reserved1[3]; \ + ULONG ROMBaseAddress; \ + UCHAR InterruptLine; \ + UCHAR InterruptPin; \ + USHORT BridgeControl; \ + } type1; \ + struct _PCI_HEADER_TYPE_2 { \ + ULONG SocketRegistersBaseAddress; \ + UCHAR CapabilitiesPtr; \ + UCHAR Reserved; \ + USHORT SecondaryStatus; \ + UCHAR PrimaryBus; \ + UCHAR SecondaryBus; \ + UCHAR SubordinateBus; \ + UCHAR SecondaryLatency; \ + struct { \ + ULONG Base; \ + ULONG Limit; \ + } Range[PCI_TYPE2_ADDRESSES-1]; \ + UCHAR InterruptLine; \ + UCHAR InterruptPin; \ + USHORT BridgeControl; \ + } type2; \ + } u; + typedef struct _PCI_COMMON_HEADER { PCI_COMMON_HEADER_LAYOUT } PCI_COMMON_HEADER, *PPCI_COMMON_HEADER;
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