Author: tkreuzer
Date: Thu Dec 31 15:29:50 2009
New Revision: 44823
URL:
http://svn.reactos.org/svn/reactos?rev=44823&view=rev
Log:
[HAL]
- Implement architecture specific HalpSetInterruptGate, replacing SetInterruptGate
Modified:
branches/ros-amd64-bringup/reactos/hal/halamd64/generic/misc.c
branches/ros-amd64-bringup/reactos/hal/halx86/generic/misc.c
branches/ros-amd64-bringup/reactos/hal/halx86/include/halp.h
branches/ros-amd64-bringup/reactos/hal/halx86/mp/apic.c
Modified: branches/ros-amd64-bringup/reactos/hal/halamd64/generic/misc.c
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/h…
==============================================================================
--- branches/ros-amd64-bringup/reactos/hal/halamd64/generic/misc.c [iso-8859-1]
(original)
+++ branches/ros-amd64-bringup/reactos/hal/halamd64/generic/misc.c [iso-8859-1] Thu Dec 31
15:29:50 2009
@@ -45,6 +45,40 @@
/* Use kernel memory manager I/O map facilities */
MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
}
+
+VOID
+NTAPI
+HalpInitIdtEntry(PKIDTENTRY64 Idt, PVOID Address)
+{
+ Idt->OffsetLow = (ULONG_PTR)Address & 0xffff;
+ Idt->OffsetMiddle = ((ULONG_PTR)Address >> 16) & 0xffff;
+ Idt->OffsetHigh = (ULONG_PTR)Address >> 32;
+ Idt->Selector = KGDT_64_R0_CODE;
+ Idt->IstIndex = 0;
+ Idt->Type = 0x0e;
+ Idt->Dpl = 0;
+ Idt->Present = 1;
+ Idt->Reserved0 = 0;
+ Idt->Reserved1 = 0;
+}
+
+VOID
+NTAPI
+HalpSetInterruptGate(ULONG Index, PVOID Address)
+{
+ ULONG_PTR Flags;
+
+ /* Disable interupts */
+ Flags = __readeflags();
+ _disable();
+
+ /* Initialize the entry */
+ HalpInitIdtEntry(&KeGetPcr()->IdtBase[Index], Address);
+
+ /* Enable interrupts if they were enabled previously */
+ __writeeflags(Flags);
+}
+
/* FUNCTIONS *****************************************************************/
Modified: branches/ros-amd64-bringup/reactos/hal/halx86/generic/misc.c
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/h…
==============================================================================
--- branches/ros-amd64-bringup/reactos/hal/halx86/generic/misc.c [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/hal/halx86/generic/misc.c [iso-8859-1] Thu Dec 31
15:29:50 2009
@@ -41,6 +41,27 @@
{
/* Use kernel memory manager I/O map facilities */
MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
+}
+
+VOID
+NTAPI
+HalpSetInterruptGate(ULONG Index, PVOID address)
+{
+ KIDTENTRY *idt;
+ KIDT_ACCESS Access;
+
+ /* Set the IDT Access Bits */
+ Access.Reserved = 0;
+ Access.Present = 1;
+ Access.Dpl = 0; /* Kernel-Mode */
+ Access.SystemSegmentFlag = 0;
+ Access.SegmentType = I386_INTERRUPT_GATE;
+
+ idt = (KIDTENTRY*)((ULONG)KeGetPcr()->IDT + index * sizeof(KIDTENTRY));
+ idt->Offset = (USHORT)((ULONG_PTR)address & 0xffff);
+ idt->Selector = KGDT_R0_CODE;
+ idt->Access = Access.Value;
+ idt->ExtendedOffset = (USHORT)((ULONG_PTR)address >> 16);
}
/* FUNCTIONS *****************************************************************/
@@ -103,3 +124,4 @@
/* Not implemented on x86 */
return;
}
+
Modified: branches/ros-amd64-bringup/reactos/hal/halx86/include/halp.h
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/h…
==============================================================================
--- branches/ros-amd64-bringup/reactos/hal/halx86/include/halp.h [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/hal/halx86/include/halp.h [iso-8859-1] Thu Dec 31
15:29:50 2009
@@ -235,6 +235,10 @@
VOID
);
+VOID
+NTAPI
+HalpSetInterruptGate(ULONG Index, PVOID Address);
+
#ifdef _M_AMD64
#define KfLowerIrql KeLowerIrql
#ifndef CONFIG_SMP
Modified: branches/ros-amd64-bringup/reactos/hal/halx86/mp/apic.c
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/hal/h…
==============================================================================
--- branches/ros-amd64-bringup/reactos/hal/halx86/mp/apic.c [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/hal/halx86/mp/apic.c [iso-8859-1] Thu Dec 31
15:29:50 2009
@@ -848,44 +848,6 @@
CPUMap[CPU].BusSpeed%1000000);
}
-VOID
-SetInterruptGate(ULONG index, ULONG_PTR address)
-{
-#ifdef _M_AMD64
- KIDTENTRY64 *idt;
-
- idt = &KeGetPcr()->IdtBase[index];
-
- idt->OffsetLow = address & 0xffff;
- idt->Selector = KGDT_64_R0_CODE;
- idt->IstIndex = 0;
- idt->Reserved0 = 0;
- idt->Type = 0x0e;
- idt->Dpl = 0;
- idt->Present = 1;
- idt->OffsetMiddle = (address >> 16) & 0xffff;
- idt->OffsetHigh = address >> 32;
- idt->Reserved1 = 0;
- idt->Alignment = 0;
-#else
- KIDTENTRY *idt;
- KIDT_ACCESS Access;
-
- /* Set the IDT Access Bits */
- Access.Reserved = 0;
- Access.Present = 1;
- Access.Dpl = 0; /* Kernel-Mode */
- Access.SystemSegmentFlag = 0;
- Access.SegmentType = I386_INTERRUPT_GATE;
-
- idt = (KIDTENTRY*)((ULONG)KeGetPcr()->IDT + index * sizeof(KIDTENTRY));
- idt->Offset = (USHORT)(address & 0xffff);
- idt->Selector = KGDT_R0_CODE;
- idt->Access = Access.Value;
- idt->ExtendedOffset = (USHORT)(address >> 16);
-#endif
-}
-
VOID HaliInitBSP(VOID)
{
#ifdef CONFIG_SMP
@@ -904,11 +866,11 @@
BSPInitialized = TRUE;
/* Setup interrupt handlers */
- SetInterruptGate(LOCAL_TIMER_VECTOR, (ULONG_PTR)MpsTimerInterrupt);
- SetInterruptGate(ERROR_VECTOR, (ULONG_PTR)MpsErrorInterrupt);
- SetInterruptGate(SPURIOUS_VECTOR, (ULONG_PTR)MpsSpuriousInterrupt);
+ HalpSetInterruptGate(LOCAL_TIMER_VECTOR, MpsTimerInterrupt);
+ HalpSetInterruptGate(ERROR_VECTOR, MpsErrorInterrupt);
+ HalpSetInterruptGate(SPURIOUS_VECTOR, MpsSpuriousInterrupt);
#ifdef CONFIG_SMP
- SetInterruptGate(IPI_VECTOR, (ULONG_PTR)MpsIpiInterrupt);
+ HalpSetInterruptGate(IPI_VECTOR, MpsIpiInterrupt);
#endif
DPRINT1("APIC is mapped at 0x%p\n", (PVOID)APICBase);