https://git.reactos.org/?p=reactos.git;a=commitdiff;h=754e175d12454cecc3996…
commit 754e175d12454cecc3996b207bf9650b048060e4
Author: Thomas Faber <thomas.faber(a)reactos.org>
AuthorDate: Sat Nov 4 14:08:56 2017 +0100
Commit: Thomas Faber <thomas.faber(a)reactos.org>
CommitDate: Sat Feb 22 12:33:54 2020 +0100
[NTOS:MM] Use MI_ZERO_PTES as the number of usable zeroing PTEs, not the total
allocated. CORE-11856
We'll now have 32 usable zeroing PTEs instead of 31.
MP kernels will (some day) zero up to 32 pages at a time.
---
ntoskrnl/mm/ARM3/hypermap.c | 6 +++---
ntoskrnl/mm/ARM3/i386/init.c | 6 +++---
ntoskrnl/mm/amd64/init.c | 7 ++++---
3 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/ntoskrnl/mm/ARM3/hypermap.c b/ntoskrnl/mm/ARM3/hypermap.c
index 9391cee80bc..6f7c32aa45e 100644
--- a/ntoskrnl/mm/ARM3/hypermap.c
+++ b/ntoskrnl/mm/ARM3/hypermap.c
@@ -122,7 +122,7 @@ MiMapPagesInZeroSpace(IN PMMPFN Pfn1,
//
ASSERT(KeGetCurrentIrql() == PASSIVE_LEVEL);
ASSERT(NumberOfPages != 0);
- ASSERT(NumberOfPages <= (MI_ZERO_PTES - 1));
+ ASSERT(NumberOfPages <= MI_ZERO_PTES);
//
// Pick the first zeroing PTE
@@ -138,7 +138,7 @@ MiMapPagesInZeroSpace(IN PMMPFN Pfn1,
//
// Reset the PTEs
//
- Offset = MI_ZERO_PTES - 1;
+ Offset = MI_ZERO_PTES;
PointerPte->u.Hard.PageFrameNumber = Offset;
KeFlushProcessTb();
}
@@ -192,7 +192,7 @@ MiUnmapPagesInZeroSpace(IN PVOID VirtualAddress,
//
ASSERT(KeGetCurrentIrql() == PASSIVE_LEVEL);
ASSERT (NumberOfPages != 0);
- ASSERT (NumberOfPages <= (MI_ZERO_PTES - 1));
+ ASSERT(NumberOfPages <= MI_ZERO_PTES);
//
// Get the first PTE for the mapped zero VA
diff --git a/ntoskrnl/mm/ARM3/i386/init.c b/ntoskrnl/mm/ARM3/i386/init.c
index 6d3e2e7045b..79ed102c230 100644
--- a/ntoskrnl/mm/ARM3/i386/init.c
+++ b/ntoskrnl/mm/ARM3/i386/init.c
@@ -522,14 +522,14 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
//
// Reserve system PTEs for zeroing PTEs and clear them
//
- MiFirstReservedZeroingPte = MiReserveSystemPtes(MI_ZERO_PTES,
+ MiFirstReservedZeroingPte = MiReserveSystemPtes(MI_ZERO_PTES + 1,
SystemPteSpace);
- RtlZeroMemory(MiFirstReservedZeroingPte, MI_ZERO_PTES * sizeof(MMPTE));
+ RtlZeroMemory(MiFirstReservedZeroingPte, (MI_ZERO_PTES + 1) * sizeof(MMPTE));
//
// Set the counter to maximum to boot with
//
- MiFirstReservedZeroingPte->u.Hard.PageFrameNumber = MI_ZERO_PTES - 1;
+ MiFirstReservedZeroingPte->u.Hard.PageFrameNumber = MI_ZERO_PTES;
/* Lock PFN database */
OldIrql = MiAcquirePfnLock();
diff --git a/ntoskrnl/mm/amd64/init.c b/ntoskrnl/mm/amd64/init.c
index 0f6ae0eceaa..6e3344bfe52 100644
--- a/ntoskrnl/mm/amd64/init.c
+++ b/ntoskrnl/mm/amd64/init.c
@@ -382,11 +382,12 @@ MiBuildSystemPteSpace(VOID)
MiInitializeSystemPtes(PointerPte, MmNumberOfSystemPtes, SystemPteSpace);
/* Reserve system PTEs for zeroing PTEs and clear them */
- MiFirstReservedZeroingPte = MiReserveSystemPtes(MI_ZERO_PTES, SystemPteSpace);
- RtlZeroMemory(MiFirstReservedZeroingPte, MI_ZERO_PTES * sizeof(MMPTE));
+ MiFirstReservedZeroingPte = MiReserveSystemPtes(MI_ZERO_PTES + 1,
+ SystemPteSpace);
+ RtlZeroMemory(MiFirstReservedZeroingPte, (MI_ZERO_PTES + 1) * sizeof(MMPTE));
/* Set the counter to maximum */
- MiFirstReservedZeroingPte->u.Hard.PageFrameNumber = MI_ZERO_PTES - 1;
+ MiFirstReservedZeroingPte->u.Hard.PageFrameNumber = MI_ZERO_PTES;
}
static