[ros-arm-bringup] 34496: - Implement NtSetLdrEntries, NtVdmControl, KeSaveStateForHibernate, KeQueryActiveProcessors, KeSetDmaIoCoherency, KeFlushEntireTb, KeGetRecommendedSharedDataAlignment, KeDisableInterrupts, KeInvalidateAllCaches, KeIcacheFlushCount and remove them from stubs_asm.S

Author: ros-arm-bringup
Date: Sun Jul 13 22:50:38 2008
New Revision: 34496

URL: http://svn.reactos.org/svn/reactos?rev=34496&view=rev
Log:
- Implement NtSetLdrEntries, NtVdmControl, KeSaveStateForHibernate,
KeQueryActiveProcessors, KeSetDmaIoCoherency, KeFlushEntireTb,
KeGetRecommendedSharedDataAlignment, KeDisableInterrupts, KeInvalidateAllCaches,
KeIcacheFlushCount and remove them from stubs_asm.S

Modified:
    trunk/reactos/ntoskrnl/include/internal/arm/intrin_i.h
    trunk/reactos/ntoskrnl/ke/arm/cpu.c
    trunk/reactos/ntoskrnl/ke/arm/stubs.c
    trunk/reactos/ntoskrnl/ke/arm/stubs_asm.s

Modified: trunk/reactos/ntoskrnl/include/internal/arm/intrin_i.h
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/include/internal/…
==============================================================================
--- trunk/reactos/ntoskrnl/include/internal/arm/intrin_i.h [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/include/internal/arm/intrin_i.h [iso-8859-1] Sun Jul 13
22:50:38 2008
@@ -136,6 +136,13 @@
 
 FORCEINLINE
 VOID
+KeArmInvalidateAllCaches(VOID)
+{
+    __asm__ __volatile__ ("mcr p15, 0, %0, c7, c7, 0" : : "r"(0) :
"cc");
+}
+
+FORCEINLINE
+VOID
 KeArmFlushIcache(VOID)
 {
     __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 0" : : "r"(0) :
"cc");

Modified: trunk/reactos/ntoskrnl/ke/arm/cpu.c
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/cpu.c?rev=…
==============================================================================
--- trunk/reactos/ntoskrnl/ke/arm/cpu.c [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/ke/arm/cpu.c [iso-8859-1] Sun Jul 13 22:50:38 2008
@@ -16,6 +16,15 @@
 
 ULONG KeFixedTbEntries;
 ULONG KiDmaIoCoherency;
+ULONG KeIcacheFlushCount = 0;
+CCHAR KeNumberProcessors;
+ULONG KeDcacheFlushCount;
+ULONG KeActiveProcessors;
+ULONG KeProcessorArchitecture;
+ULONG KeProcessorLevel;
+ULONG KeProcessorRevision;
+ULONG KeFeatureBits;
+ULONG KeLargestCacheLine = 32; // FIXME: It depends
 
 /* FUNCTIONS ******************************************************************/
 
@@ -117,6 +126,16 @@
 
 VOID
 NTAPI
+KeFlushCurrentTb(VOID)
+{
+    //
+    // Rename?
+    //
+    KeFlushTb();
+}
+
+VOID
+NTAPI
 KiSaveProcessorControlState(OUT PKPROCESSOR_STATE ProcessorState)
 {
     //
@@ -127,3 +146,146 @@
     ProcessorState->SpecialRegisters.CacheRegister = KeArmCacheRegisterGet();
     ProcessorState->SpecialRegisters.StatusRegister = KeArmStatusRegisterGet();
 }
+
+BOOLEAN
+NTAPI
+KeInvalidateAllCaches(VOID)
+{
+    //
+    // Invalidate D cache and I cache
+    //
+    KeArmInvalidateAllCaches();
+    return TRUE;
+}
+
+BOOLEAN
+NTAPI
+KeDisableInterrupts(VOID)
+{
+    ARM_STATUS_REGISTER Flags;
+    
+    //
+    // Get current interrupt state and disable interrupts
+    //
+    Flags = KeArmStatusRegisterGet();
+    _disable();
+    
+    //
+    // Return previous interrupt state
+    //
+    return Flags.IrqDisable;
+}
+
+/* PUBLIC FUNCTIONS ***********************************************************/
+
+/*
+ * @implemented
+ */
+ULONG
+NTAPI
+KeGetRecommendedSharedDataAlignment(VOID)
+{
+    /* Return the global variable */
+    return KeLargestCacheLine;
+}
+
+/*
+ * @implemented
+ */
+VOID
+NTAPI
+KeFlushEntireTb(IN BOOLEAN Invalid,
+                IN BOOLEAN AllProcessors)
+{
+    KIRQL OldIrql;
+    
+    //
+    // Raise the IRQL for the TB Flush
+    //
+    OldIrql = KeRaiseIrqlToSynchLevel();
+    
+    //
+    // Flush the TB for the Current CPU
+    //
+    KeFlushCurrentTb();
+    
+    //
+    // Return to Original IRQL
+    //
+    KeLowerIrql(OldIrql);
+}
+
+/*
+ * @implemented
+ */
+VOID
+NTAPI
+KeSetDmaIoCoherency(IN ULONG Coherency)
+{
+    //
+    // Save the coherency globally
+    //
+    KiDmaIoCoherency = Coherency;
+}
+
+/*
+ * @implemented
+ */
+KAFFINITY
+NTAPI
+KeQueryActiveProcessors(VOID)
+{
+    PAGED_CODE();
+    
+    //
+    // Simply return the number of active processors
+    //
+    return KeActiveProcessors;
+}
+
+/*
+ * @implemented
+ */
+VOID
+__cdecl
+KeSaveStateForHibernate(IN PKPROCESSOR_STATE State)
+{
+    //
+    // Capture the context
+    //
+    RtlCaptureContext(&State->ContextFrame);
+    
+    //
+    // Capture the control state
+    //
+    KiSaveProcessorControlState(State);
+}
+
+/* SYSTEM CALLS NOT VALID ON THIS CPU *****************************************/
+
+/*
+ * @implemented
+ */
+NTSTATUS
+NTAPI
+NtVdmControl(IN ULONG ControlCode,
+             IN PVOID ControlData)
+{
+    //
+    // Does not exist on ARM
+    //
+    return STATUS_NOT_IMPLEMENTED;
+}
+
+NTSTATUS
+NTAPI
+NtSetLdtEntries(IN ULONG Selector1,
+                IN LDT_ENTRY LdtEntry1,
+                IN ULONG Selector2,
+                IN LDT_ENTRY LdtEntry2)
+{
+    //
+    // Does not exist on ARM
+    //
+    return STATUS_NOT_IMPLEMENTED;
+}

Modified: trunk/reactos/ntoskrnl/ke/arm/stubs.c
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/stubs.c?re…
==============================================================================
--- trunk/reactos/ntoskrnl/ke/arm/stubs.c [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/ke/arm/stubs.c [iso-8859-1] Sun Jul 13 22:50:38 2008
@@ -2,10 +2,3 @@
 #define NDEBUG
 #include "debug.h"
 
-CCHAR KeNumberProcessors;
-ULONG KeDcacheFlushCount;
-ULONG KeActiveProcessors;
-ULONG KeProcessorArchitecture;
-ULONG KeProcessorLevel;
-ULONG KeProcessorRevision;
-ULONG KeFeatureBits;

Modified: trunk/reactos/ntoskrnl/ke/arm/stubs_asm.s
URL:
http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/stubs_asm.…
==============================================================================
--- trunk/reactos/ntoskrnl/ke/arm/stubs_asm.s [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/ke/arm/stubs_asm.s [iso-8859-1] Sun Jul 13 22:50:38 2008
@@ -40,21 +40,3 @@
 GENERATE_ARM_STUB KeUserModeCallback 
 GENERATE_ARM_STUB NtCallbackReturn
 GENERATE_ARM_STUB NtContinue
-
-//
-// Non-ARM Functionality
-//
-GENERATE_ARM_STUB NtSetLdtEntries
-GENERATE_ARM_STUB NtVdmControl 
-
-//
-// Ke Arch-Specific Helpers
-//
-GENERATE_ARM_STUB KeDisableInterrupts
-GENERATE_ARM_STUB KeFlushEntireTb 
-GENERATE_ARM_STUB KeGetRecommendedSharedDataAlignment 
-GENERATE_ARM_STUB KeIcacheFlushCount 
-GENERATE_ARM_STUB KeInvalidateAllCaches
-GENERATE_ARM_STUB KeQueryActiveProcessors 
-GENERATE_ARM_STUB KeSaveStateForHibernate 
-GENERATE_ARM_STUB KeSetDmaIoCoherency