[sserapion] 44634: [uniata] - Make x86 specific optimizations x86 specific, use macros otherwise. - Try to fix numerous pointer to ULONG casts. - Now Builds for amd64.
17 Dec
2009
17 Dec
'09
5:55 a.m.
Author: sserapion
Date: Thu Dec 17 06:55:53 2009
New Revision: 44634
URL: http://svn.reactos.org/svn/reactos?rev=44634&view=rev
Log:
[uniata]
- Make x86 specific optimizations x86 specific, use macros otherwise.
- Try to fix numerous pointer to ULONG casts.
- Now Builds for amd64.
Modified:
branches/ros-amd64-bringup/reactos/drivers/storage/ide/directory.rbuild
branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_ata.cpp
branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_dma.cpp
branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_init.cpp
branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_probe.cpp
branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_sata.cpp
branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/inc/misc.h
branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/tools.h
branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/uniata.rbuild
Modified: branches/ros-amd64-bringup/reactos/drivers/storage/ide/directory.rbuild
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/drive…
==============================================================================
--- branches/ros-amd64-bringup/reactos/drivers/storage/ide/directory.rbuild [iso-8859-1]
(original)
+++ branches/ros-amd64-bringup/reactos/drivers/storage/ide/directory.rbuild [iso-8859-1]
Thu Dec 17 06:55:53 2009
@@ -10,7 +10,7 @@
<directory name="pciidex">
<xi:include href="pciidex/pciidex.rbuild" />
</directory>
- <!-- directory name="uniata">
+ <directory name="uniata">
<xi:include href="uniata/uniata.rbuild" />
- </directory -->
+ </directory>
</group>
Modified: branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_ata.cpp
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/drive…
==============================================================================
--- branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_ata.cpp [iso-8859-1]
(original)
+++ branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_ata.cpp [iso-8859-1]
Thu Dec 17 06:55:53 2009
@@ -2041,16 +2041,16 @@
goto default_reset;
offset = ((Channel & 1) << 7) + ((Channel & 2) << 8);
/* disable PHY state change interrupt */
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + offset, 0);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0), 0x148 + offset, 0);
UniataSataClearErr(HwDeviceExtension, j, UNIATA_SATA_IGNORE_CONNECT);
/* reset controller part for this channel */
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x48,
- AtapiReadPortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x48) | (0xc0 >> Channel));
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0), 0x48,
+ AtapiReadPortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0), 0x48) | (0xc0 >>
Channel));
AtapiStallExecution(1000);
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x48,
- AtapiReadPortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x48) & ~(0xc0 >>
Channel));
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0), 0x48,
+ AtapiReadPortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0), 0x48) & ~(0xc0 >>
Channel));
break; }
@@ -3613,7 +3613,7 @@
switch(ChipType) {
case PROLD:
case PRNEW:
- status = AtapiReadPortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x1c);
+ status = AtapiReadPortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x1c);
if (!DmaTransfer)
break;
if (!(status &
@@ -3633,10 +3633,10 @@
}
break;
case PRMIO:
- status = AtapiReadPortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x0040);
+ status = AtapiReadPortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x0040);
if(ChipFlags & PRSATA) {
- pr_status = AtapiReadPortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x006c);
- AtapiWritePortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x006c, pr_status & 0x000000ff);
+ pr_status = AtapiReadPortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x006c);
+ AtapiWritePortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x006c, pr_status &
0x000000ff);
}
if(pr_status & (0x11 << Channel)) {
// TODO: reset channel
@@ -3662,11 +3662,11 @@
/* get and clear interrupt status */
if(ChipFlags & NVQ) {
- pr_status = AtapiReadPortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs);
- AtapiWritePortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs, (0x0fUL << shift) |
0x00f000f0);
+ pr_status = AtapiReadPortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),offs);
+ AtapiWritePortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),offs, (0x0fUL << shift) |
0x00f000f0);
} else {
- pr_status = AtapiReadPortEx1(chan,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs);
- AtapiWritePortEx1(chan,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs, (0x0f << shift));
+ pr_status = AtapiReadPortEx1(chan,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),offs);
+ AtapiWritePortEx1(chan,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),offs, (0x0f << shift));
}
KdPrint2((PRINT_PREFIX " pr_status %x\n", pr_status));
Modified: branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_dma.cpp
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/drive…
==============================================================================
--- branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_dma.cpp [iso-8859-1]
(original)
+++ branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_dma.cpp [iso-8859-1]
Thu Dec 17 06:55:53 2009
@@ -251,7 +251,7 @@
return FALSE;
}
//KdPrint2((PRINT_PREFIX " checkpoint 3\n" ));
- if((ULONG)data & deviceExtension->AlignmentMask) {
+ if((ULONG_PTR)data & deviceExtension->AlignmentMask) {
KdPrint2((PRINT_PREFIX "AtapiDmaSetup: unaligned data: %#x (%#x)\n",
data, deviceExtension->AlignmentMask));
return FALSE;
}
@@ -293,7 +293,7 @@
return FALSE;
}
- dma_count = min(count, (PAGE_SIZE - ((ULONG)data & PAGE_MASK)));
+ dma_count = min(count, (PAGE_SIZE - ((ULONG_PTR)data & PAGE_MASK)));
data += dma_count;
count -= dma_count;
i = 0;
@@ -495,10 +495,10 @@
if(ChipType == PRNEW) {
ULONG Channel = deviceExtension->Channel + lChannel;
if(chan->ChannelCtrlFlags & CTRFLAGS_LBA48) {
- AtapiWritePortEx1(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11,
- AtapiReadPortEx1(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11) |
+ AtapiWritePortEx1(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x11,
+ AtapiReadPortEx1(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x11) |
(Channel ? 0x08 : 0x02));
- AtapiWritePortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),(Channel ? 0x24 : 0x20),
+ AtapiWritePortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),(Channel ? 0x24 : 0x20),
((Srb->SrbFlags & SRB_FLAGS_DATA_IN) ? 0x05000000 :
0x06000000) | (Srb->DataTransferLength >> 1)
);
}
@@ -562,10 +562,10 @@
if(ChipType == PRNEW) {
ULONG Channel = deviceExtension->Channel + lChannel;
if(chan->ChannelCtrlFlags & CTRFLAGS_LBA48) {
- AtapiWritePortEx1(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11,
- AtapiReadPortEx1(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11) &
+ AtapiWritePortEx1(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x11,
+ AtapiReadPortEx1(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x11) &
~(Channel ? 0x08 : 0x02));
- AtapiWritePortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),(Channel ? 0x24 : 0x20),
+ AtapiWritePortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),(Channel ? 0x24 : 0x20),
0
);
}
@@ -1083,18 +1083,18 @@
apiomode = 4;
for(i=udmamode; i>=0; i--) {
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt,
ATA_UDMA0 + i)) {
- AtapiWritePortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_udmatiming[udmamode]);
+ AtapiWritePortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0), mode_reg,
cyr_udmatiming[udmamode]);
return;
}
}
for(i=wdmamode; i>=0; i--) {
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt,
ATA_WDMA0 + i)) {
- AtapiWritePortEx4(chan,
(ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_wdmatiming[wdmamode]);
+ AtapiWritePortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0), mode_reg,
cyr_wdmatiming[wdmamode]);
return;
}
}
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 +
apiomode)) {
- AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),
mode_reg, cyr_piotiming[apiomode]);
+ AtapiWritePortEx4(chan,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0), mode_reg,
cyr_piotiming[apiomode]);
return;
}
return;
@@ -1837,8 +1837,8 @@
case ATA_WDMA2: reg24 = 0x00002020; break;
case ATA_UDMA2: reg24 = 0x00911030; break;
}
- AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressBM_0),(dev*8) +
0x20, reg20);
- AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressBM_0),(dev*8) +
0x24, reg24);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),(dev*8) + 0x20, reg20);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),(dev*8) + 0x24, reg24);
} // cyrix_timing()
VOID
Modified: branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_init.cpp
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/drive…
==============================================================================
--- branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_init.cpp [iso-8859-1]
(original)
+++ branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_init.cpp [iso-8859-1]
Thu Dec 17 06:55:53 2009
@@ -1526,17 +1526,17 @@
KdPrint2((PRINT_PREFIX "BaseIoAddressSATA_0=%x\n",
deviceExtension->BaseIoAddressSATA_0.Addr));
if(ChipFlags & NVQ) {
/* clear interrupt status */
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs, 0x00ff00ff);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),offs, 0x00ff00ff);
/* enable device and PHY state change interrupts */
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs+4, 0x000d000d);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),offs+4, 0x000d000d);
/* disable NCQ support */
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x0400,
- AtapiReadPortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x0400) & 0xfffffff9);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),0x0400,
+ AtapiReadPortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),0x0400) & 0xfffffff9);
} else {
/* clear interrupt status */
- AtapiWritePortEx1(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs, 0xff);
+ AtapiWritePortEx1(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),offs, 0xff);
/* enable device and PHY state change interrupts */
- AtapiWritePortEx1(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs+1, 0xdd);
+ AtapiWritePortEx1(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),offs+1, 0xdd);
}
/* enable PCI interrupt */
ChangePciConfig2(offsetof(PCI_COMMON_CONFIG, Command), (a &
~0x0400));
@@ -1567,16 +1567,16 @@
/* setup clocks */
if(c == CHAN_NOT_SPECIFIED) {
// ATA_OUTB(ctlr->r_res1, 0x11, ATA_INB(ctlr->r_res1, 0x11) | 0x0a);
- AtapiWritePortEx1(NULL,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11,
- AtapiReadPortEx1(NULL,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11) | 0x0a );
+ AtapiWritePortEx1(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x11,
+ AtapiReadPortEx1(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x11) | 0x0a );
}
/* FALLTHROUGH */
case PROLD:
/* enable burst mode */
// ATA_OUTB(ctlr->r_res1, 0x1f, ATA_INB(ctlr->r_res1, 0x1f) | 0x01);
if(c == CHAN_NOT_SPECIFIED) {
- AtapiWritePortEx1(NULL,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x1f,
- AtapiReadPortEx1(NULL,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x1f) | 0x01 );
+ AtapiWritePortEx1(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x1f,
+ AtapiReadPortEx1(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x1f) | 0x01 );
} else {
// check 80-pin cable
chan = &deviceExtension->chan[c];
@@ -1601,7 +1601,7 @@
case PRMIO:
if(c == CHAN_NOT_SPECIFIED) {
if(ChipFlags & PRSATA) {
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressBM_0),0x6c, 0x000000ff);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressBM_0),0x6c, 0x000000ff);
}
} else {
chan = &deviceExtension->chan[c];
@@ -1680,16 +1680,16 @@
unit10 = (c & 2);
if(ChipFlags & SIINOSATAIRQ) {
KdPrint2((PRINT_PREFIX "Disable broken SATA intr on
c=%x\n", c));
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) +
(unit10 << 8),0);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) +
(unit10 << 8),0);
}
}
} else {
if(ChipFlags & SIINOSATAIRQ) {
KdPrint2((PRINT_PREFIX "Disable broken SATA intr on
c=%x\n", c));
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) +
(unit10 << 8),0);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) +
(unit10 << 8),0);
} else {
KdPrint2((PRINT_PREFIX "Enable SATA intr on c=%x\n",
c));
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) +
(unit10 << 8),(1 << 16));
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) +
(unit10 << 8),(1 << 16));
}
}
}
@@ -1699,16 +1699,16 @@
// Enable 3rd and 4th channels
if (ChipFlags & SII4CH) {
KdPrint2((PRINT_PREFIX "SII4CH\n"));
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x0200, 0x00000002);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),0x0200, 0x00000002);
}
} else {
chan = &deviceExtension->chan[c];
/* dont block interrupts */
//ChangePciConfig4(0x48, (a & ~0x03c00000));
- tmp32 = AtapiReadPortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x48);
- AtapiWritePortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x48, (1 << 22) << c);
+ tmp32 = AtapiReadPortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),0x48);
+ AtapiWritePortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),0x48, (1 << 22) <<
c);
// flush
- tmp32 = AtapiReadPortEx4(NULL,
(ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x48);
+ tmp32 = AtapiReadPortEx4(NULL,
PtrToUlong(&deviceExtension->BaseIoAddressSATA_0),0x48);
/* Initialize FIFO PCI bus arbitration */
GetPciConfig1(offsetof(PCI_COMMON_CONFIG, CacheLineSize), tmp8);
@@ -1908,7 +1908,7 @@
for(c=0; c<deviceExtension->NumberChannels; c++) {
chan = &deviceExtension->chan[c];
for (i=0; i<IDX_BM_IO_SZ; i++) {
- chan->RegTranslation[IDX_BM_IO+i].Addr = BaseIoAddressBM_0 ?
((ULONG)BaseIoAddressBM_0 + i) : 0;
+ chan->RegTranslation[IDX_BM_IO+i].Addr = BaseIoAddressBM_0 ?
((ULONG_PTR)BaseIoAddressBM_0 + i) : 0;
chan->RegTranslation[IDX_BM_IO+i].MemIo = MemIo;
}
if(BaseIoAddressBM_0) {
@@ -1928,11 +1928,11 @@
ULONG i;
for (i=0; i<IDX_IO1_SZ; i++) {
- chan->RegTranslation[IDX_IO1+i].Addr = BaseIoAddress1 ? ((ULONG)BaseIoAddress1
+ i) : 0;
+ chan->RegTranslation[IDX_IO1+i].Addr = BaseIoAddress1 ?
((ULONG_PTR)BaseIoAddress1 + i) : 0;
chan->RegTranslation[IDX_IO1+i].MemIo = FALSE;
}
for (i=0; i<IDX_IO2_SZ; i++) {
- chan->RegTranslation[IDX_IO2+i].Addr = BaseIoAddress2 ? ((ULONG)BaseIoAddress2
+ i) : 0;
+ chan->RegTranslation[IDX_IO2+i].Addr = BaseIoAddress2 ?
((ULONG_PTR)BaseIoAddress2 + i) : 0;
chan->RegTranslation[IDX_IO2+i].MemIo = FALSE;
}
UniataInitSyncBaseIO(chan);
Modified: branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_probe.cpp
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/drive…
==============================================================================
--- branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_probe.cpp
[iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_probe.cpp
[iso-8859-1] Thu Dec 17 06:55:53 2009
@@ -98,7 +98,7 @@
IN ULONG length
)
{
- ULONG io_start = 0;
+ ULONG_PTR io_start = 0;
KdPrint2((PRINT_PREFIX " AtapiGetIoRange:\n"));
if(ConfigInfo->NumberOfAccessRanges <= rid)
@@ -115,7 +115,7 @@
if((*ConfigInfo->AccessRanges)[rid].RangeInMemory) {
io_start =
// Get the system physical address for this IO range.
- ((ULONG)ScsiPortGetDeviceBase(HwDeviceExtension,
+ ((ULONG_PTR)ScsiPortGetDeviceBase(HwDeviceExtension,
PCIBus /*ConfigInfo->AdapterInterfaceType*/,
SystemIoBusNumber /*ConfigInfo->SystemIoBusNumber*/,
ScsiPortConvertUlongToPhysicalAddress(
@@ -873,7 +873,7 @@
ULONG dev_id;
PCI_SLOT_NUMBER slotData;
- ULONG i;
+ ULONG_PTR i;
ULONG channel;
ULONG c = 0;
PUCHAR ioSpace;
@@ -926,7 +926,7 @@
KdPrint2((PRINT_PREFIX "AdapterInterfaceType: Isa\n"));
}
if(InDriverEntry) {
- i = (ULONG)Context;
+ i = (ULONG_PTR)Context;
if(i & 0x80000000) {
AltInit = TRUE;
}
@@ -942,7 +942,7 @@
}
if(i >= BMListLen) {
KdPrint2((PRINT_PREFIX "unexpected device arrival\n"));
- i = (ULONG)Context;
+ i = (ULONG_PTR)Context;
if(FirstMasterOk) {
channel = 1;
}
@@ -1179,7 +1179,7 @@
BaseIoAddressBM_0,
(*ConfigInfo->AccessRanges)[4].RangeInMemory ? TRUE :
FALSE);
deviceExtension->BusMaster = TRUE;
- deviceExtension->BaseIoAddressBM_0.Addr = (ULONG)BaseIoAddressBM_0;
+ deviceExtension->BaseIoAddressBM_0.Addr =
(ULONG_PTR)BaseIoAddressBM_0;
if((*ConfigInfo->AccessRanges)[4].RangeInMemory) {
deviceExtension->BaseIoAddressBM_0.MemIo = TRUE;
}
@@ -1749,7 +1749,7 @@
ULONG dev_id;
PCI_SLOT_NUMBER slotData;
- ULONG i;
+ ULONG_PTR i;
// PUCHAR ioSpace;
// UCHAR statusByte;
@@ -1771,7 +1771,7 @@
*Again = FALSE;
if(InDriverEntry) {
- i = (ULONG)Context;
+ i = (ULONG_PTR)Context;
} else {
for(i=0; i<BMListLen; i++) {
if(BMList[i].slotNumber == ConfigInfo->SlotNumber &&
@@ -1957,7 +1957,7 @@
BaseIoAddressBM_0,
(*ConfigInfo->AccessRanges)[4].RangeInMemory ? TRUE : FALSE);
deviceExtension->BusMaster = TRUE;
- deviceExtension->BaseIoAddressBM_0.Addr = (ULONG)BaseIoAddressBM_0;
+ deviceExtension->BaseIoAddressBM_0.Addr = (ULONG_PTR)BaseIoAddressBM_0;
if((*ConfigInfo->AccessRanges)[4].RangeInMemory) {
deviceExtension->BaseIoAddressBM_0.MemIo = TRUE;
}
@@ -2379,14 +2379,14 @@
ioSpace = (PUCHAR)ScsiPortGetDeviceBase(HwDeviceExtension,
ConfigInfo->AdapterInterfaceType,
ConfigInfo->SystemIoBusNumber,
-
ScsiPortConvertUlongToPhysicalAddress((ULONG)BaseIoAddress1 + 0x0E),
+
ScsiPortConvertUlongToPhysicalAddress((ULONG_PTR)BaseIoAddress1 + 0x0E),
ATA_ALTIOSIZE,
TRUE);
} else {
ioSpace = (PUCHAR)ScsiPortGetDeviceBase(HwDeviceExtension,
ConfigInfo->AdapterInterfaceType,
ConfigInfo->SystemIoBusNumber,
-
ScsiPortConvertUlongToPhysicalAddress((ULONG)BaseIoAddress1 + ATA_ALTOFFSET),
+
ScsiPortConvertUlongToPhysicalAddress((ULONG_PTR)BaseIoAddress1 + ATA_ALTOFFSET),
ATA_ALTIOSIZE,
TRUE);
}
Modified: branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_sata.cpp
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/drive…
==============================================================================
--- branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_sata.cpp [iso-8859-1]
(original)
+++ branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/id_sata.cpp [iso-8859-1]
Thu Dec 17 06:55:53 2009
@@ -218,20 +218,20 @@
ULONGLONG base;
/* reset AHCI controller */
- AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC,
- AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0,
IDX_AHCI_GHC) | AHCI_GHC_HR);
+ AtapiWritePortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_GHC,
+ AtapiReadPortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_GHC) | AHCI_GHC_HR);
AtapiStallExecution(1000000);
- if(AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC)
& AHCI_GHC_HR) {
+ if(AtapiReadPortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_GHC) & AHCI_GHC_HR) {
KdPrint2((PRINT_PREFIX " AHCI reset failed\n"));
return FALSE;
}
/* enable AHCI mode */
- AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC,
- AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0,
IDX_AHCI_GHC) | AHCI_GHC_AE);
-
- CAP = AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0,
IDX_AHCI_CAP);
- PI = AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0,
IDX_AHCI_PI);
+ AtapiWritePortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_GHC,
+ AtapiReadPortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_GHC) | AHCI_GHC_AE);
+
+ CAP = AtapiReadPortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_CAP);
+ PI = AtapiReadPortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_PI);
/* get the number of HW channels */
for(i=PI, n=0; i; n++, i=i>>1);
deviceExtension->NumberChannels =
@@ -242,14 +242,14 @@
}
/* clear interrupts */
- AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_IS,
- AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0,
IDX_AHCI_IS));
+ AtapiWritePortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_IS,
+ AtapiReadPortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_IS));
/* enable AHCI interrupts */
- AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC,
- AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0,
IDX_AHCI_GHC) | AHCI_GHC_IE);
-
- version = AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0,
IDX_AHCI_VS);
+ AtapiWritePortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_GHC,
+ AtapiReadPortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_GHC) | AHCI_GHC_IE);
+
+ version = AtapiReadPortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_VS);
KdPrint2((PRINT_PREFIX " AHCI version %x%x.%x%x controller with %d ports (mask
%x) detected\n",
(version >> 24) & 0xff, (version >> 16) & 0xff,
(version >> 8) & 0xff, version & 0xff,
deviceExtension->NumberChannels, PI));
@@ -295,15 +295,15 @@
KdPrint2((PRINT_PREFIX " AHCI buffer allocation failed\n"));
return FALSE;
}
- AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, offs +
IDX_AHCI_P_CLB,
+ AtapiWritePortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0), offs +
IDX_AHCI_P_CLB,
(ULONG)(base & 0xffffffff));
- AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, offs +
IDX_AHCI_P_CLB + 4,
+ AtapiWritePortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0), offs +
IDX_AHCI_P_CLB + 4,
(ULONG)((base >> 32) & 0xffffffff));
base = chan->AHCI_CL_PhAddr + ATA_AHCI_MAX_TAGS;
- AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, offs +
IDX_AHCI_P_FB,
+ AtapiWritePortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0), offs +
IDX_AHCI_P_FB,
(ULONG)(base & 0xffffffff));
- AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, offs +
IDX_AHCI_P_FB + 4,
+ AtapiWritePortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0), offs +
IDX_AHCI_P_FB + 4,
(ULONG)((base >> 32) & 0xffffffff));
chan->ChannelCtrlFlags |= CTRFLAGS_NO_SLAVE;
@@ -328,25 +328,25 @@
SATA_SSTATUS_REG SStatus;
SATA_SERROR_REG SError;
ULONG offs = sizeof(IDE_AHCI_REGISTERS) + Channel*sizeof(IDE_AHCI_PORT_REGISTERS);
- ULONG base;
+ ULONG_PTR base;
ULONG tag=0;
KdPrint(("UniataAhciStatus:\n"));
- hIS = AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0,
IDX_AHCI_IS);
+ hIS = AtapiReadPortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_IS);
KdPrint((" hIS %x\n", hIS));
hIS &= (1 << Channel);
if(!hIS) {
return 0;
}
- base = (ULONG)&deviceExtension->BaseIoAHCI_0 + offs;
+ base = (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0 + offs);
IS.Reg = AtapiReadPort4(chan, base + IDX_AHCI_P_IS);
CI = AtapiReadPort4(chan, base + IDX_AHCI_P_CI);
SStatus.Reg = AtapiReadPort4(chan, IDX_SATA_SStatus);
SError.Reg = AtapiReadPort4(chan, IDX_SATA_SError);
/* clear interrupt(s) */
- AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_IS,
hIS);
+ AtapiWritePortEx4(NULL, PtrToUlong(&deviceExtension->BaseIoAHCI_0),
IDX_AHCI_IS, hIS);
AtapiWritePort4(chan, base + IDX_AHCI_P_IS, IS.Reg);
AtapiWritePort4(chan, IDX_SATA_SError, SError.Reg);
Modified: branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/inc/misc.h
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/drive…
==============================================================================
--- branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/inc/misc.h [iso-8859-1]
(original)
+++ branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/inc/misc.h [iso-8859-1]
Thu Dec 17 06:55:53 2009
@@ -1,6 +1,7 @@
#ifndef __CROSSNT_MISC__H__
#define __CROSSNT_MISC__H__
+#if defined(_M_X86_)
extern "C"
void
__fastcall
@@ -126,5 +127,6 @@
void* b // EDX
);
#define XCHG_DD(a,b) _XCHG_DD(&(a),&(b))
+#endif
#endif // __CROSSNT_MISC__H__
Modified: branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/tools.h
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/drive…
==============================================================================
--- branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/tools.h [iso-8859-1]
(original)
+++ branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/tools.h [iso-8859-1] Thu
Dec 17 06:55:53 2009
@@ -94,9 +94,9 @@
}
#define DEC_TO_BCD(x) (((x / 10) << 4) + (x % 10))
-/*
-
-#if defined _X86_ && !defined(__GNUC__)
+
+
+#if defined(_M_X86_) && defined(_MSC_VER)
#define MOV_DD_SWP(a,b) \
{ \
@@ -203,7 +203,7 @@
__asm mov [ebx],eax \
}
-#else // NO X86 optimization , use generic C/C++
+#elif !defined(_M_X86_) // NO X86 optimization , use generic C/C++
#define MOV_DD_SWP(a,b) \
{ \
@@ -246,6 +246,17 @@
_to_->Byte2 = _from_->Byte1; \
_to_->Byte3 = _from_->Byte0; \
}
+
+#define MOV_SWP_DW2DD(a,b) \
+{ \
+ PFOUR_BYTE _from_, _to_; \
+ _from_ = ((PFOUR_BYTE)&(b)); \
+ _to_ = ((PFOUR_BYTE)&(a)); \
+ *((PUSHORT)_to_) = 0; \
+ _to_->Byte0 = _from_->Byte1; \
+ _to_->Byte1 = _from_->Byte0; \
+}
+
#define MOV_MSF(a,b) \
{ \
@@ -282,7 +293,7 @@
#define MOV_3B_SWP(a,b) MOV_MSF_SWP(a,b)
-*/
+
#ifdef DBG
Modified: branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/uniata.rbuild
URL:
http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/drive…
==============================================================================
--- branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/uniata.rbuild
[iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/drivers/storage/ide/uniata/uniata.rbuild
[iso-8859-1] Thu Dec 17 06:55:53 2009
@@ -23,6 +23,8 @@
<directory name="ros_glue">
<file>ros_glue.cpp</file>
- <file>ros_glue_asm.s</file>
+ <if property="ARCH" value="i386">
+ <file>ros_glue_asm.s</file>
+ </if>
</directory>
</module>
5419
days inactive
5419
days old
0 comments
1 participants
participants (1)
-
sserapion＠svn.reactos.org