[tkreuzer] 54062: [FREELDR] set CF, ZF and SF based on REGS structure, when doing int's. Fixes slowness during 2nd stage boot in QEMU. Dedicated to Samuel.

Author: tkreuzer
Date: Sun Oct  9 16:26:19 2011
New Revision: 54062

URL: http://svn.reactos.org/svn/reactos?rev=54062&view=rev
Log:
[FREELDR]
set CF, ZF and SF based on REGS structure, when doing int's. Fixes slowness during 2nd stage boot in QEMU. Dedicated to Samuel.

Modified:
    trunk/reactos/boot/freeldr/freeldr/arch/realmode/int386.inc

Modified: trunk/reactos/boot/freeldr/freeldr/arch/realmode/int386.inc
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/boot/freeldr/freeldr/arch/r...
==============================================================================
--- trunk/reactos/boot/freeldr/freeldr/arch/realmode/int386.inc [iso-8859-1] (original)
+++ trunk/reactos/boot/freeldr/freeldr/arch/realmode/int386.inc [iso-8859-1] Sun Oct  9 16:26:19 2011
@@ -1,5 +1,9 @@

#include "../../include/arch/pc/pcbios.h"
+
+#define EFLAGS_CF HEX(01)
+#define EFLAGS_ZF HEX(40)
+#define EFLAGS_SF HEX(80)

Int386:
    /* Save all registers + segment registers */
@@ -12,6 +16,20 @@
     /* Get the interupt vector and patch the opcode */
     mov al, byte ptr ds:[BSS_IntVector]
     mov byte ptr ds:[Int386_vector_opcode], al
+
+	/* Get current EFLAGS and mask CF, ZF and SF */
+	pushf
+	pop cx
+	and cx, not (EFLAGS_CF or EFLAGS_ZF or EFLAGS_SF)
+
+	/* Get flags CF, ZF and SF from the REGS structure */
+	mov ax, word ptr cs:[BSS_RegisterSet + REGS_EFLAGS]
+	and ax, (EFLAGS_CF or EFLAGS_ZF or EFLAGS_SF)
+
+	/* Combine flags and set them */
+	or ax, cx
+	push ax
+	popf

/* Setup the registers */
    mov ax, word ptr cs:[BSS_RegisterSet + REGS_DS]
@@ -30,9 +48,6 @@
    mov esi, dword ptr cs:[BSS_RegisterSet + REGS_ESI]
    mov edi, dword ptr cs:[BSS_RegisterSet + REGS_EDI]
    mov ebp, dword ptr cs:[BSS_RegisterSet + REGS_EBP]
-
-	/* Do not set the flags register */
-	/* only return its value in regsout */

/* Call the interrupt vector */
    /*int		Int386_vector*/