Ros-diffs February 2010

ros-diffs@reactos.org

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365 discussions

[sir_richard] 45511: [ARMDDK]: Use the same KPCR structure on ARM as on x86. [ARMDDK]: Use the same addresses for KPCR and KUSER_SHARED_DATA on ARM as on x86. On ARM however, since there are no "segments", the KPCR is also mapped in user-mode, read-only, to have a static structure that can point to the current TEB.

by sir_richard＠svn.reactos.org

Author: sir_richard Date: Tue Feb 9 03:08:24 2010 New Revision: 45511 URL: http://svn.reactos.org/svn/reactos?rev=45511&view=rev Log: [ARMDDK]: Use the same KPCR structure on ARM as on x86. [ARMDDK]: Use the same addresses for KPCR and KUSER_SHARED_DATA on ARM as on x86. On ARM however, since there are no "segments", the KPCR is also mapped in user-mode, read-only, to have a static structure that can point to the current TEB. Modified: trunk/reactos/include/reactos/arm/armddk.h Modified: trunk/reactos/include/reactos/arm/armddk.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/reactos/arm/armddk… ============================================================================== --- trunk/reactos/include/reactos/arm/armddk.h [iso-8859-1] (original) +++ trunk/reactos/include/reactos/arm/armddk.h [iso-8859-1] Tue Feb 9 03:08:24 2010 @@ -28,10 +28,10 @@ // // FIXME: mmtypes.h? // -#define KIPCR 0xFFFFF000 -#define KI_USER_SHARED_DATA 0xFFFFE000 +#define KIP0PCRADDRESS 0xFFDFF000 +#define KI_USER_SHARED_DATA 0xFFDF0000 #define USPCR 0x7FFF0000 -#define PCR ((volatile KPCR * const)KIPCR) +#define PCR ((KPCR * const)KIP0PCRADDRESS) #define USERPCR ((volatile KPCR * const)USPCR) #define KeGetPcr() PCR #ifndef _WINNT_H @@ -47,24 +47,12 @@ #define MM_SYSTEM_RANGE_START MmSystemRangeStart #define MM_USER_PROBE_ADDRESS MmUserProbeAddress #define MM_LOWEST_USER_ADDRESS (PVOID)0x10000 -#define MM_LOWEST_SYSTEM_ADDRESS (PVOID)0xC1400000 +#define MM_LOWEST_SYSTEM_ADDRESS (PVOID)0xC0800000 // // Maximum IRQs // #define MAXIMUM_VECTOR 16 - -// -// Just read it from the PCR -// -#define KeGetCurrentProcessorNumber() (int)PCR->Number -#define KeGetCurrentIrql() PCR->CurrentIrql -#define _KeGetCurrentThread() PCR->CurrentThread -#define _KeGetPreviousMode() PCR->CurrentThread->PreviousMode -#define _KeIsExecutingDpc() (PCR->DpcRoutineActive != 0) -#define KeGetCurrentThread() _KeGetCurrentThread() -#define KeGetPreviousMode() _KeGetPreviousMode() -#define KeGetDcacheFillSize() PCR->DcacheFillSize // @@ -132,7 +120,6 @@ // // Processor Control Region -// On ARM, it's actually readable from user-mode, much like KUSER_SHARED_DATA // #ifdef _WINNT_H typedef @@ -141,60 +128,36 @@ #endif typedef struct _KPCR { - ULONG MinorVersion; - ULONG MajorVersion; - PKINTERRUPT_ROUTINE InterruptRoutine[32]; - PVOID XcodeDispatch; - ULONG FirstLevelDcacheSize; - ULONG FirstLevelDcacheFillSize; - ULONG FirstLevelIcacheSize; - ULONG FirstLevelIcacheFillSize; - ULONG SecondLevelDcacheSize; - ULONG SecondLevelDcacheFillSize; - ULONG SecondLevelIcacheSize; - ULONG SecondLevelIcacheFillSize; + union + { + NT_TIB NtTib; + struct + { + struct _EXCEPTION_REGISTRATION_RECORD *Used_ExceptionList; // Unused + PVOID Used_StackBase; // Unused + PVOID PerfGlobalGroupMask; + PVOID TssCopy; // Unused + ULONG ContextSwitches; + KAFFINITY SetMemberCopy; // Unused + PVOID Used_Self; + }; + }; + struct _KPCR *Self; struct _KPRCB *Prcb; - struct _TEB *Teb; - PVOID TlsArray; - ULONG DcacheFillSize; - ULONG IcacheAlignment; - ULONG IcacheFillSize; - ULONG ProcessorId; - ULONG ProfileInterval; - ULONG ProfileCount; - ULONG StallExecutionCount; + KIRQL Irql; + ULONG IRR; // Unused + ULONG IrrActive; // Unused + ULONG IDR; // Unused + PVOID KdVersionBlock; + PVOID IDT; // Unused + PVOID GDT; // Unused + PVOID TSS; // Unused + USHORT MajorVersion; + USHORT MinorVersion; + KAFFINITY SetMember; ULONG StallScaleFactor; - CCHAR Number; - PVOID DataBusError; - PVOID InstructionBusError; - ULONG CachePolicy; - ULONG AlignedCachePolicy; - UCHAR IrqlMask[32]; - ULONG IrqlTable[32]; - UCHAR CurrentIrql; - KAFFINITY SetMember; - struct _KTHREAD *CurrentThread; - ULONG ReservedVectors; - KAFFINITY NotMember; - ULONG SystemReserved[6]; - ULONG DcacheAlignment; - ULONG HalReserved[64]; - BOOLEAN FirstLevelActive; - BOOLEAN DpcRoutineActive; - ULONG CurrentPid; - BOOLEAN OnInterruptStack; - PVOID SavedInitialStack; - PVOID SavedStackLimit; - PVOID SystemServiceDispatchStart; - PVOID SystemServiceDispatchEnd; - PVOID InterruptStack; - PVOID PanicStack; - PVOID BadVaddr; - PVOID InitialStack; - PVOID StackLimit; - ULONG QuantumEnd; - PVOID PerfGlobalGroupMask; - ULONG ContextSwitches; + UCHAR SpareUnused; + UCHAR Number; } KPCR, *PKPCR; // @@ -203,7 +166,7 @@ FORCEINLINE struct _TEB* NtCurrentTeb(VOID) { - return (struct _TEB*)USERPCR->Teb; + return (struct _TEB*)USERPCR->Used_Self; } #ifndef _WINNT_H

14 years, 10 months

[sir_richard] 45510: [ARM DDK]: Use the closest possible approximation to the x86 KPCR/KPRCB (in fact, the public KPCR is identical, just the KIPCR is different, internally), instead of a mashup of PPC and MIPS structures.

by sir_richard＠svn.reactos.org

Author: sir_richard Date: Tue Feb 9 03:06:29 2010 New Revision: 45510 URL: http://svn.reactos.org/svn/reactos?rev=45510&view=rev Log: [ARM DDK]: Use the closest possible approximation to the x86 KPCR/KPRCB (in fact, the public KPCR is identical, just the KIPCR is different, internally), instead of a mashup of PPC and MIPS structures. Modified: trunk/reactos/include/ndk/arm/ketypes.h Modified: trunk/reactos/include/ndk/arm/ketypes.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/ndk/arm/ketypes.h?… ============================================================================== --- trunk/reactos/include/ndk/arm/ketypes.h [iso-8859-1] (original) +++ trunk/reactos/include/ndk/arm/ketypes.h [iso-8859-1] Tue Feb 9 03:06:29 2010 @@ -316,9 +316,13 @@ UCHAR Reserved; USHORT BuildType; KAFFINITY SetMember; + UCHAR CpuType; + UCHAR CpuID; + USHORT CpuStep; KPROCESSOR_STATE ProcessorState; ULONG KernelReserved[16]; ULONG HalReserved[16]; + UCHAR PrcbPad0[92]; KSPIN_LOCK_QUEUE LockQueue[LockQueueMaximumLock]; struct _KTHREAD *NpxThread; ULONG InterruptCount; @@ -334,7 +338,6 @@ UCHAR NodeColor; UCHAR Spare1; ULONG NodeShiftedColor; - ULONG PcrPage; struct _KNODE *ParentNode; ULONG MultiThreadProcessorSet; struct _KPRCB *MultiThreadSetMaster; @@ -361,19 +364,22 @@ LARGE_INTEGER IoReadTransferCount; LARGE_INTEGER IoWriteTransferCount; LARGE_INTEGER IoOtherTransferCount; - ULONG KeContextSwitches; + ULONG SpareCounter1[8]; PP_LOOKASIDE_LIST PPLookasideList[16]; PP_LOOKASIDE_LIST PPNPagedLookasideList[32]; PP_LOOKASIDE_LIST PPPagedLookasideList[32]; volatile ULONG PacketBarrier; volatile ULONG ReverseStall; PVOID IpiFrame; + UCHAR PrcbPad2[52]; volatile PVOID CurrentPacket[3]; volatile ULONG TargetSet; volatile PKIPI_WORKER WorkerRoutine; volatile ULONG IpiFrozen; + UCHAR PrcbPad3[40]; volatile ULONG RequestSummary; volatile struct _KPRCB *SignalDone; + UCHAR PrcbPad4[56]; struct _KDPC_DATA DpcData[2]; PVOID DpcStack; ULONG MaximumDpcQueueDepth; @@ -391,15 +397,19 @@ KEVENT DpcEvent; UCHAR ThreadDpcEnable; volatile BOOLEAN QuantumEnd; + UCHAR PrcbPad50; volatile UCHAR IdleSchedule; LONG DpcSetEventRequest; + UCHAR PrcbPad5[18]; LONG TickOffset; KDPC CallDpc; + ULONG PrcbPad7[8]; LIST_ENTRY WaitListHead; ULONG ReadySummary; ULONG QueueIndex; LIST_ENTRY DispatcherReadyListHead[32]; SINGLE_LIST_ENTRY DeferredReadyListHead; + ULONG PrcbPad72[11]; PVOID ChainedInterruptList; LONG LookasideIrpFloat; volatile LONG MmPageFaultCount; @@ -415,12 +425,78 @@ volatile LONG MmDirtyWriteIoCount; volatile LONG MmMappedPagesWriteCount; volatile LONG MmMappedWriteIoCount; + ULONG SpareFields0[1]; CHAR VendorString[13]; + UCHAR InitialApicId; + UCHAR LogicalProcessorsPerPhysicalProcessor; ULONG MHz; ULONG FeatureBits; + LARGE_INTEGER UpdateSignature; volatile LARGE_INTEGER IsrTime; + LARGE_INTEGER SpareField1; + //FX_SAVE_AREA NpxSaveArea; PROCESSOR_POWER_STATE PowerState; } KPRCB, *PKPRCB; + +// +// Processor Control Region +// +typedef struct _KIPCR +{ + union + { + NT_TIB NtTib; + struct + { + struct _EXCEPTION_REGISTRATION_RECORD *Used_ExceptionList; // Unused + PVOID Used_StackBase; // Unused + PVOID PerfGlobalGroupMask; + PVOID TssCopy; // Unused + ULONG ContextSwitches; + KAFFINITY SetMemberCopy; // Unused + PVOID Used_Self; + }; + }; + struct _KPCR *Self; + struct _KPRCB *Prcb; + KIRQL Irql; + ULONG IRR; // Unused + ULONG IrrActive; // Unused + ULONG IDR; // Unused + PVOID KdVersionBlock; + PVOID IDT; // Unused + PVOID GDT; // Unused + PVOID TSS; // Unused + USHORT MajorVersion; + USHORT MinorVersion; + KAFFINITY SetMember; + ULONG StallScaleFactor; + UCHAR SpareUnused; + UCHAR Number; + // arm part + UCHAR Spare0[2]; + UCHAR IrqlMask[32]; + ULONG IrqlTable[32]; + PKINTERRUPT_ROUTINE InterruptRoutine[32]; + ULONG ReservedVectors; + ULONG FirstLevelDcacheSize; + ULONG FirstLevelDcacheFillSize; + ULONG FirstLevelIcacheSize; + ULONG FirstLevelIcacheFillSize; + ULONG SecondLevelDcacheSize; + ULONG SecondLevelDcacheFillSize; + ULONG SecondLevelIcacheSize; + ULONG SecondLevelIcacheFillSize; + ULONG DcacheFillSize; + ULONG DcacheAlignment; + ULONG IcacheAlignment; + ULONG IcacheFillSize; + ULONG ProcessorId; + PVOID InterruptStack; + PVOID PanicStack; + PVOID InitialStack; + KPRCB PrcbData; +} KIPCR, *PKIPCR; // // Macro to get current KPRCB @@ -432,5 +508,17 @@ return PCR->Prcb; } +// +// Just read it from the PCR +// +#define KeGetCurrentProcessorNumber() (int)PCR->Number +#define KeGetCurrentIrql() PCR->Irql +#define _KeGetCurrentThread() KeGetCurrentPrcb()->CurrentThread +#define _KeGetPreviousMode() KeGetCurrentPrcb()->CurrentThread->PreviousMode +#define _KeIsExecutingDpc() (KeGetCurrentPrcb()->DpcRoutineActive != 0) +#define KeGetCurrentThread() _KeGetCurrentThread() +#define KeGetPreviousMode() _KeGetPreviousMode() +#define KeGetDcacheFillSize() PCR->DcacheFillSize + #endif #endif

14 years, 10 months

[sir_richard] 45509: [NTOS]: Sync up KiDispatchException with x86 code (and going back to C comment formatting).

by sir_richard＠svn.reactos.org

Author: sir_richard Date: Tue Feb 9 03:00:52 2010 New Revision: 45509 URL: http://svn.reactos.org/svn/reactos?rev=45509&view=rev Log: [NTOS]: Sync up KiDispatchException with x86 code (and going back to C comment formatting). Modified: trunk/reactos/ntoskrnl/ke/arm/exp.c Modified: trunk/reactos/ntoskrnl/ke/arm/exp.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/exp.c?rev=… ============================================================================== --- trunk/reactos/ntoskrnl/ke/arm/exp.c [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/ke/arm/exp.c [iso-8859-1] Tue Feb 9 03:00:52 2010 @@ -176,67 +176,51 @@ IN BOOLEAN FirstChance) { CONTEXT Context; - - // - // Increase number of Exception Dispatches - // + + /* Increase number of Exception Dispatches */ KeGetCurrentPrcb()->KeExceptionDispatchCount++; - - // - // Set the context flags - // + + /* Set the context flags */ Context.ContextFlags = CONTEXT_FULL; - // - // FIXME-V6: VFP Support - // - - // - // Get a Context - // + /* Check if User Mode or if the kernel debugger is enabled */ + if ((PreviousMode == UserMode) || (KeGetPcr()->KdVersionBlock)) + { + /* FIXME-V6: VFP Support */ + } + + /* Get a Context */ KeTrapFrameToContext(TrapFrame, ExceptionFrame, &Context); - - // - // Look at our exception code - // + + /* Look at our exception code */ switch (ExceptionRecord->ExceptionCode) { - // - // Breakpoint - // + /* Breakpoint */ case STATUS_BREAKPOINT: - - // - // We want the instruction right before the int 3 - // + + /* Decrement PC by four */ Context.Pc -= sizeof(ULONG); break; - - // - // Internal exception - // + + /* Internal exception */ case KI_EXCEPTION_ACCESS_VIOLATION: - - // - // Set correct code - // + + /* Set correct code */ ExceptionRecord->ExceptionCode = STATUS_ACCESS_VIOLATION; + if (PreviousMode == UserMode) + { + /* FIXME: Handle no execute */ + } break; } - - // - // Handle kernel-mode first, it's simpler - // + + /* Handle kernel-mode first, it's simpler */ if (PreviousMode == KernelMode) { - // - // Check if this is a first-chance exception - // + /* Check if this is a first-chance exception */ if (FirstChance == TRUE) { - // - // Break into the debugger for the first time - // + /* Break into the debugger for the first time */ if (KiDebugRoutine(TrapFrame, ExceptionFrame, ExceptionRecord, @@ -244,21 +228,15 @@ PreviousMode, FALSE)) { - // - // Exception was handled - // + /* Exception was handled */ goto Handled; } - - // - // If the Debugger couldn't handle it, dispatch the exception - // + + /* If the Debugger couldn't handle it, dispatch the exception */ if (RtlDispatchException(ExceptionRecord, &Context)) goto Handled; } - - // - // This is a second-chance exception, only for the debugger - // + + /* This is a second-chance exception, only for the debugger */ if (KiDebugRoutine(TrapFrame, ExceptionFrame, ExceptionRecord, @@ -266,15 +244,11 @@ PreviousMode, TRUE)) { - // - // Exception was handled - // + /* Exception was handled */ goto Handled; } - - // - // Third strike; you're out - // + + /* Third strike; you're out */ KeBugCheckEx(KMODE_EXCEPTION_NOT_HANDLED, ExceptionRecord->ExceptionCode, (ULONG_PTR)ExceptionRecord->ExceptionAddress, @@ -283,19 +257,27 @@ } else { - // - // FIXME-USER: Do user-mode exception handling - // - ASSERT(FALSE); - } - + /* FIXME: TODO */ + /* 3rd strike, kill the process */ + DPRINT1("Kill %.16s, ExceptionCode: %lx, ExceptionAddress: %lx\n", + PsGetCurrentProcess()->ImageFileName, + ExceptionRecord->ExceptionCode, + ExceptionRecord->ExceptionAddress); + + ZwTerminateProcess(NtCurrentProcess(), ExceptionRecord->ExceptionCode); + KeBugCheckEx(KMODE_EXCEPTION_NOT_HANDLED, + ExceptionRecord->ExceptionCode, + (ULONG_PTR)ExceptionRecord->ExceptionAddress, + (ULONG_PTR)TrapFrame, + 0); + } + Handled: - // - // Convert the context back into Trap/Exception Frames - // + /* Convert the context back into Trap/Exception Frames */ KeContextToTrapFrame(&Context, ExceptionFrame, TrapFrame, Context.ContextFlags, PreviousMode); + return; }

14 years, 10 months

[sir_richard] 45508: [NTOS]: Get rid of fixed TLB entries on ARM, I don't think that idea makes sense (unlike IA64 or MIPS where they are lot more flexible), since they only allow 1MB sections, not pages.

by sir_richard＠svn.reactos.org

Author: sir_richard Date: Tue Feb 9 03:00:15 2010 New Revision: 45508 URL: http://svn.reactos.org/svn/reactos?rev=45508&view=rev Log: [NTOS]: Get rid of fixed TLB entries on ARM, I don't think that idea makes sense (unlike IA64 or MIPS where they are lot more flexible), since they only allow 1MB sections, not pages. Modified: trunk/reactos/ntoskrnl/ke/arm/cpu.c Modified: trunk/reactos/ntoskrnl/ke/arm/cpu.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/cpu.c?rev=… ============================================================================== --- trunk/reactos/ntoskrnl/ke/arm/cpu.c [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/ke/arm/cpu.c [iso-8859-1] Tue Feb 9 03:00:15 2010 @@ -24,7 +24,7 @@ ULONG KeProcessorLevel; ULONG KeProcessorRevision; ULONG KeFeatureBits; -ULONG KeLargestCacheLine = 32; // FIXME: It depends +ULONG KeLargestCacheLine = 64; // FIXME: It depends /* FUNCTIONS ******************************************************************/ @@ -36,83 +36,6 @@ // Just invalidate it // KeArmInvalidateTlbEntry(Virtual); -} - -VOID -KeFillFixedEntryTb(IN ARM_PTE Pte, - IN PVOID Virtual, - IN ULONG Index) -{ - ARM_LOCKDOWN_REGISTER LockdownRegister; - ULONG OldVictimCount; - volatile unsigned long Temp; - PARM_TRANSLATION_TABLE TranslationTable; - - // - // Fixed TB entries must be section entries - // - Virtual = (PVOID)((ULONG)Virtual & 0xFFF00000); - - // - // On ARM, we can't set the index ourselves, so make sure that we are not - // locking down more than 8 entries. - // - UNREFERENCED_PARAMETER(Index); - KeFixedTbEntries++; - ASSERT(KeFixedTbEntries <= 8); - - // - // Flush the address - // - KiFlushSingleTb(TRUE, Virtual); - - // - // Read lockdown register and set the preserve bit - // - LockdownRegister = KeArmLockdownRegisterGet(); - LockdownRegister.Preserve = TRUE; - OldVictimCount = LockdownRegister.Victim; - KeArmLockdownRegisterSet(LockdownRegister); - - // - // Map the PTE for this virtual address - // - TranslationTable = (PVOID)KeArmTranslationTableRegisterGet().AsUlong; - TranslationTable->Pte[(ULONG)Virtual >> PDE_SHIFT] = Pte; - - // - // Now force a miss - // - Temp = *(PULONG)Virtual; - - // - // Read lockdown register - // - LockdownRegister = KeArmLockdownRegisterGet(); - if (LockdownRegister.Victim == 0) - { - // - // This can only happen on QEMU or broken CPUs since there *has* - // to have been at least a miss since the system started. For example, - // QEMU doesn't support TLB lockdown. - // - // On these systems, we'll just keep the PTE mapped - // - } - else - { - // - // Clear the preserve bits - // - LockdownRegister.Preserve = FALSE; - ASSERT(LockdownRegister.Victim == OldVictimCount + 1); - KeArmLockdownRegisterSet(LockdownRegister); - - // - // Clear the PTE - // - TranslationTable->Pte[(ULONG)Virtual >> PDE_SHIFT].AsUlong = 0; - } } VOID

14 years, 10 months

[sir_richard] 45507: [NTOS]: Forgot to setup an IRQ stack, the kernel was working by magic since in previous incarnations of the ARM port, 0xFFFFyyyy was mapped, so a stack of 0 worked (going downwards). [NTOS]: Now FreeLDR just calls the KiSystemStartup routine correctly, without any "magic", so fix the code to use a1 instead of a2 (argument 1/2).

by sir_richard＠svn.reactos.org

Author: sir_richard Date: Tue Feb 9 02:54:14 2010 New Revision: 45507 URL: http://svn.reactos.org/svn/reactos?rev=45507&view=rev Log: [NTOS]: Forgot to setup an IRQ stack, the kernel was working by magic since in previous incarnations of the ARM port, 0xFFFFyyyy was mapped, so a stack of 0 worked (going downwards). [NTOS]: Now FreeLDR just calls the KiSystemStartup routine correctly, without any "magic", so fix the code to use a1 instead of a2 (argument 1/2). Modified: trunk/reactos/ntoskrnl/ke/arm/boot.s Modified: trunk/reactos/ntoskrnl/ke/arm/boot.s URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/boot.s?rev… ============================================================================== --- trunk/reactos/ntoskrnl/ke/arm/boot.s [iso-8859-1] (original) +++ trunk/reactos/ntoskrnl/ke/arm/boot.s [iso-8859-1] Tue Feb 9 02:54:14 2010 @@ -14,61 +14,53 @@ NESTED_ENTRY KiSystemStartup PROLOG_END KiSystemStartup - // - // Put us in FIQ mode - // - b . + /* Put us in FIQ mode */ mrs r3, cpsr orr r3, r1, #CPSR_FIQ_MODE msr cpsr, r3 - // - // Set FIQ stack and registers - // - ldr sp, [a2, #LpbInterruptStack] + /* Set FIQ stack and registers */ + ldr sp, [a1, #LpbInterruptStack] mov r8, #0 mov r9, #0 mov r10, #0 - // - // Put us in ABORT mode - // + /* Repeat for IRQ mode */ + mrs r3, cpsr + orr r3, r1, #CPSR_IRQ_MODE + msr cpsr, r3 + ldr sp, [a1, #LpbInterruptStack] + mov r8, #0 + mov r9, #0 + mov r10, #0 + + /* Put us in ABORT mode */ mrs r3, cpsr orr r3, r1, #CPSR_ABORT_MODE msr cpsr, r3 - // - // Set panic stack - // - ldr sp, [a2, #LpbPanicStack] + /* Set panic stack */ + ldr sp, [a1, #LpbPanicStack] - // - // Put us in UND (Undefined) mode - // + /* Put us in UND (Undefined) mode */ mrs r3, cpsr orr r3, r1, #CPSR_UND_MODE msr cpsr, r3 - // - // Set panic stack - // - ldr sp, [a2, #LpbPanicStack] + /* Set panic stack */ + ldr sp, [a1, #LpbPanicStack] - // - // Put us into SVC (Supervisor) mode - // + /* Put us into SVC (Supervisor) mode */ mrs r3, cpsr orr r3, r1, #CPSR_SVC_MODE msr cpsr, r3 - // - // Switch to boot kernel stack - // - ldr sp, [a2, #LpbKernelStack] + /* Switch to boot kernel stack */ + ldr sp, [a1, #LpbKernelStack] - // - // Go to C code - // + /* Go to C code */ b KiInitializeSystem ENTRY_END KiSystemStartup + +/* EOF */

14 years, 10 months

[sir_richard] 45506: [ARM SDK]: Use real Versatile base addresses instead of the old hacked FreeLDR base addresses.

by sir_richard＠svn.reactos.org

Author: sir_richard Date: Tue Feb 9 02:47:54 2010 New Revision: 45506 URL: http://svn.reactos.org/svn/reactos?rev=45506&view=rev Log: [ARM SDK]: Use real Versatile base addresses instead of the old hacked FreeLDR base addresses. Modified: trunk/reactos/include/reactos/arm/peripherals/pl011.h trunk/reactos/include/reactos/arm/peripherals/pl190.h trunk/reactos/include/reactos/arm/peripherals/sp804.h Modified: trunk/reactos/include/reactos/arm/peripherals/pl011.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/reactos/arm/periph… ============================================================================== --- trunk/reactos/include/reactos/arm/peripherals/pl011.h [iso-8859-1] (original) +++ trunk/reactos/include/reactos/arm/peripherals/pl011.h [iso-8859-1] Tue Feb 9 02:47:54 2010 @@ -11,7 +11,7 @@ // // UART Registers // -#define UART_BASE (ULONG_PTR)0xE00F1000 /* HACK: freeldr mapped it here */ +#define UART_BASE (ULONG_PTR)0x101F1000 #define UART_PL01x_DR (UART_BASE + 0x00) #define UART_PL01x_RSR (UART_BASE + 0x04) Modified: trunk/reactos/include/reactos/arm/peripherals/pl190.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/reactos/arm/periph… ============================================================================== --- trunk/reactos/include/reactos/arm/peripherals/pl190.h [iso-8859-1] (original) +++ trunk/reactos/include/reactos/arm/peripherals/pl190.h [iso-8859-1] Tue Feb 9 02:47:54 2010 @@ -11,10 +11,10 @@ // // VIC Registers // -#define VIC_BASE (ULONG_PTR)0xE0040000 /* HACK: freeldr mapped it here */ +#define VIC_BASE (ULONG_PTR)0x10140000 -#define VIC_INT_STATUS (VIC_BASE + 0x00) -#define VIC_INT_ENABLE (VIC_BASE + 0x10) -#define VIC_INT_CLEAR (VIC_BASE + 0x14) -#define VIC_SOFT_INT (VIC_BASE + 0x18) -#define VIC_SOFT_INT_CLEAR (VIC_BASE + 0x1C) +#define VIC_INT_STATUS (PULONG)(VIC_BASE + 0x00) +#define VIC_INT_ENABLE (PULONG)(VIC_BASE + 0x10) +#define VIC_INT_CLEAR (PULONG)(VIC_BASE + 0x14) +#define VIC_SOFT_INT (PULONG)(VIC_BASE + 0x18) +#define VIC_SOFT_INT_CLEAR (PULONG)(VIC_BASE + 0x1C) Modified: trunk/reactos/include/reactos/arm/peripherals/sp804.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/reactos/arm/periph… ============================================================================== --- trunk/reactos/include/reactos/arm/peripherals/sp804.h [iso-8859-1] (original) +++ trunk/reactos/include/reactos/arm/peripherals/sp804.h [iso-8859-1] Tue Feb 9 02:47:54 2010 @@ -11,7 +11,7 @@ // // Timer Registers // -#define TIMER_BASE(x) (ULONG_PTR)(0xE00E2000 + (x * 0x1000)) /* HACK: freeldr mapped it here */ +#define TIMER_BASE(x) (ULONG_PTR)(0x101E2000 + (x * 0x1000)) #define TIMER0_LOAD TIMER_BASE(0) + 0x00 #define TIMER0_VALUE TIMER_BASE(0) + 0x04 #define TIMER0_CONTROL TIMER_BASE(0) + 0x08

14 years, 10 months

[sir_richard] 45505: [ARMLLB]: PutChar should be a UCHAR routine, this way we can print characters above 127 (extended ASCII). This is needed for the progress bar, for example.

by sir_richard＠svn.reactos.org

Author: sir_richard Date: Tue Feb 9 02:46:01 2010 New Revision: 45505 URL: http://svn.reactos.org/svn/reactos?rev=45505&view=rev Log: [ARMLLB]: PutChar should be a UCHAR routine, this way we can print characters above 127 (extended ASCII). This is needed for the progress bar, for example. Modified: trunk/reactos/boot/armllb/hw/video.c trunk/reactos/boot/armllb/inc/video.h Modified: trunk/reactos/boot/armllb/hw/video.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/boot/armllb/hw/video.c?rev… ============================================================================== --- trunk/reactos/boot/armllb/hw/video.c [iso-8859-1] (original) +++ trunk/reactos/boot/armllb/hw/video.c [iso-8859-1] Tue Feb 9 02:46:01 2010 @@ -274,7 +274,7 @@ VOID NTAPI -LlbVideoDrawChar(IN CHAR c, +LlbVideoDrawChar(IN UCHAR c, IN PUSHORT Buffer, IN USHORT Color, IN USHORT BackColor) @@ -342,7 +342,7 @@ VOID NTAPI -LlbVideoPutChar(IN CHAR c) +LlbVideoPutChar(IN UCHAR c) { ULONG cx, cy, CharsPerLine, BackColor, ScreenWidth; Modified: trunk/reactos/boot/armllb/inc/video.h URL: http://svn.reactos.org/svn/reactos/trunk/reactos/boot/armllb/inc/video.h?re… ============================================================================== --- trunk/reactos/boot/armllb/inc/video.h [iso-8859-1] (original) +++ trunk/reactos/boot/armllb/inc/video.h [iso-8859-1] Tue Feb 9 02:46:01 2010 @@ -15,13 +15,13 @@ VOID NTAPI LlbVideoPutChar( - IN CHAR c + IN UCHAR c ); VOID NTAPI LlbVideoDrawChar( - IN CHAR c, + IN UCHAR c, IN PUSHORT Buffer, IN USHORT Color, IN USHORT BackColor

14 years, 10 months

[sir_richard] 45504: [ARMLLB]: Fix typo.

by sir_richard＠svn.reactos.org

Author: sir_richard Date: Tue Feb 9 02:44:26 2010 New Revision: 45504 URL: http://svn.reactos.org/svn/reactos?rev=45504&view=rev Log: [ARMLLB]: Fix typo. Modified: trunk/reactos/boot/armllb/hw/versatile/hwclcd.c Modified: trunk/reactos/boot/armllb/hw/versatile/hwclcd.c URL: http://svn.reactos.org/svn/reactos/trunk/reactos/boot/armllb/hw/versatile/h… ============================================================================== --- trunk/reactos/boot/armllb/hw/versatile/hwclcd.c [iso-8859-1] (original) +++ trunk/reactos/boot/armllb/hw/versatile/hwclcd.c [iso-8859-1] Tue Feb 9 02:44:26 2010 @@ -32,7 +32,7 @@ WRITE_REGISTER_ULONG(PL110_LCDUPBASE, (ULONG)LlbHwGetFrameBuffer()); WRITE_REGISTER_ULONG(PL110_LCDLPBASE, (ULONG)LlbHwGetFrameBuffer()); - /* Initialize timings to 1024x720 */ + /* Initialize timings to 720x400 */ WRITE_REGISTER_ULONG(PL110_LCDTIMING0, LCDTIMING0_PPL(LlbHwGetScreenWidth())); WRITE_REGISTER_ULONG(PL110_LCDTIMING1, LCDTIMING1_LPP(LlbHwGetScreenHeight()));

14 years, 10 months

[cfinck] 45503: Include the correct file

by cfinck＠svn.reactos.org

Author: cfinck Date: Mon Feb 8 22:49:21 2010 New Revision: 45503 URL: http://svn.reactos.org/svn/reactos?rev=45503&view=rev Log: Include the correct file Modified: trunk/tools/RosBE/RosBE-Unix/Base-i386/scripts/createshortcut.sh Modified: trunk/tools/RosBE/RosBE-Unix/Base-i386/scripts/createshortcut.sh URL: http://svn.reactos.org/svn/reactos/trunk/tools/RosBE/RosBE-Unix/Base-i386/s… ============================================================================== --- trunk/tools/RosBE/RosBE-Unix/Base-i386/scripts/createshortcut.sh [iso-8859-1] (original) +++ trunk/tools/RosBE/RosBE-Unix/Base-i386/scripts/createshortcut.sh [iso-8859-1] Mon Feb 8 22:49:21 2010 @@ -13,7 +13,7 @@ cd `dirname $0` SCRIPTDIR="$PWD" -source "$SCRIPTDIR/rosbelibrary.sh" +source "$SCRIPTDIR/setuplibrary.sh" # Read the RosBE version

14 years, 10 months

[fireball] 45502: - Add back DIB section's "bottom down" property, which fixes existing issues (and adds new one in Explorer's start menu). Issue #28 in the Arwinss wiki. - Remove unnecessary abs'es of always positive values. - Add ScanLines/ScanStart bounds checking. - Actually return a real amount of copied scanlines instead of always faking success.

by fireball＠svn.reactos.org

Author: fireball Date: Mon Feb 8 22:42:12 2010 New Revision: 45502 URL: http://svn.reactos.org/svn/reactos?rev=45502&view=rev Log: - Add back DIB section's "bottom down" property, which fixes existing issues (and adds new one in Explorer's start menu). Issue #28 in the Arwinss wiki. - Remove unnecessary abs'es of always positive values. - Add ScanLines/ScanStart bounds checking. - Actually return a real amount of copied scanlines instead of always faking success. Modified: branches/arwinss/reactos/subsystems/win32/win32k/gdi/bitmap.c branches/arwinss/reactos/subsystems/win32/win32k/gre/bitblt.c Modified: branches/arwinss/reactos/subsystems/win32/win32k/gdi/bitmap.c URL: http://svn.reactos.org/svn/reactos/branches/arwinss/reactos/subsystems/win3… ============================================================================== --- branches/arwinss/reactos/subsystems/win32/win32k/gdi/bitmap.c [iso-8859-1] (original) +++ branches/arwinss/reactos/subsystems/win32/win32k/gdi/bitmap.c [iso-8859-1] Mon Feb 8 22:42:12 2010 @@ -136,7 +136,7 @@ /* Get DIB section size */ szSize.cx = dib->dsBm.bmWidth; - szSize.cy = abs(dib->dsBm.bmHeight); + szSize.cy = dib->dsBm.bmHeight; /* Get its format */ ulFormat = GrepBitmapFormat(dib->dsBmih.biBitCount * dib->dsBmih.biPlanes, @@ -146,7 +146,7 @@ hbmDIB = GreCreateBitmap(szSize, dib->dsBm.bmWidthBytes, ulFormat, BMF_DONTCACHE | BMF_USERMEM | BMF_NOZEROINIT | - 0, + (dib->dsBmih.biHeight < 0 ? BMF_TOPDOWN : 0), dib->dsBm.bmBits); dib->dsBmih.biClrUsed = 0; @@ -371,13 +371,13 @@ hBitmap, hUserBitmap, StartScan, ScanLines); /* Set the bits */ - GreSetDIBits(pDC, - hBitmap, - StartScan, - ScanLines, - Bits, - bmi, - ColorUse); + ScanLines = GreSetDIBits(pDC, + hBitmap, + StartScan, + ScanLines, + Bits, + bmi, + ColorUse); /* Release DC objects */ DC_Unlock(pDC); Modified: branches/arwinss/reactos/subsystems/win32/win32k/gre/bitblt.c URL: http://svn.reactos.org/svn/reactos/branches/arwinss/reactos/subsystems/win3… ============================================================================== --- branches/arwinss/reactos/subsystems/win32/win32k/gre/bitblt.c [iso-8859-1] (original) +++ branches/arwinss/reactos/subsystems/win32/win32k/gre/bitblt.c [iso-8859-1] Mon Feb 8 22:42:12 2010 @@ -594,6 +594,12 @@ { return 0; } + + if (!ScanLines || (StartScan >= bitmap->SurfObj.sizlBitmap.cy)) + return 0; + + if (StartScan + ScanLines > bitmap->SurfObj.sizlBitmap.cy) + ScanLines = bitmap->SurfObj.sizlBitmap.cy - StartScan; // Get RGB values if (ColorUse == DIB_PAL_COLORS)

14 years, 10 months

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Ros-diffs February 2010